Abstract: An information processing apparatus includes a processor that: receives, from a user terminal, a request for first update regarding a first vehicle, notifies the user terminal that the first update is to be performed at a shop, when the first update is update of hardware, and notifies the user terminal that the first update is to be performed through wireless communication, when the first update is update of software.

Abstract: An information processing device includes a processor configured to provide an incentive to a first user who sells or returns a first vehicle in which a part of a first coating film including an easily peelable layer is not peeled off.

Abstract: To fix display panels such as LCD panels in various sizes and shapes to a common display unit body. Each of the left and right fixtures comprises fixture body, first fixing portions, and second fixing portions. Second fixing portions with through holes are formed at the position of projection portions of the display unit body. Therefore, screws are screwed into tapped holes of the projection portions through through holes, thereby fixing the fixtures to display unit body. Through holes of first fixing portions are formed at the positions of tapped holes of the display panel. Therefore, screws are screwed into tapped holes of the display panel through through holes, thereby fixing the fixtures to display panel. A plurality of fixtures are prepared for the display panel with various sizes and shapes.

Abstract: An output buffer circuit is provided with at least two output MOS transistors of the same type. Each of the two output MOS transistors has a source terminal connected to a power supply or a ground and further has drain terminals connected to an output pad. Resistive elements connect the gate terminals of these output MOS transistors. An input terminal of an inverter is connected to an input signal line and an output terminal of the inverter is connected to the gate terminal of a first one of the at least two output MOS transistors. A charging MOS transistor of the same type as the at least two output MOS transistors has a drain terminal connected to the gate terminal of a second one of the at least two output MOS transistors. The charging MOS transistor has a source terminal connected to either the power supply or the ground and has a gate terminal connected to the input signal line.