Abstract: The reliability of a semiconductor device is improved. During resin injection in a molding step, in a plan view, a plurality of gates of a molding die are arranged at positions different from those over extended lines of a plurality of dicing regions and a resin is injected from the gates. In this way, it becomes possible to reduce entrainment of air in the dicing regions and to lower an occurrence rate of voids. As a consequence, it becomes possible to suppress an occurrence of poor appearance such as formation of voids in a sealing body and to suppress formation of a starting point of a crack which may occur during a reflow process. Thus, the reliability of the semiconductor device can be improved.

Abstract: The reliability of a semiconductor device is improved. During resin injection in a molding step, in a plan view, a plurality of gates of a molding die are arranged at positions different from those over extended lines of a plurality of dicing regions and a resin is injected from the gates. In this way, it becomes possible to reduce entrainment of air in the dicing regions and to lower an occurrence rate of voids. As a consequence, it becomes possible to suppress an occurrence of poor appearance such as formation of voids in a sealing body and to suppress formation of a starting point of a crack which may occur during a reflow process. Thus, the reliability of the semiconductor device can be improved.

Abstract: The reliability of a semiconductor device is improved. During resin injection in a molding step, in a plan view, a plurality of gates of a molding die are arranged at positions different from those over extended lines of a plurality of dicing regions and a resin is injected from the gates. In this way, it becomes possible to reduce entrainment of air in the dicing regions and to lower an occurrence rate of voids. As a consequence, it becomes possible to suppress an occurrence of poor appearance such as formation of voids in a sealing body and to suppress formation of a starting point of a crack which may occur during a reflow process. Thus, the reliability of the semiconductor device can be improved.

Abstract: The reliability of a semiconductor device is improved. During resin injection in a molding step, in a plan view, a plurality of gates of a molding die are arranged at positions different from those over extended lines of a plurality of dicing regions and a resin is injected from the gates. In this way, it becomes possible to reduce entrainment of air in the dicing regions and to lower an occurrence rate of voids. As a consequence, it becomes possible to suppress an occurrence of poor appearance such as formation of voids in a sealing body and to suppress formation of a starting point of a crack which may occur during a reflow process. Thus, the reliability of the semiconductor device can be improved.

Abstract: To suppress a short circuit between neighboring wires which is caused when the loop of a wire is formed into multiple stages in a semiconductor device in which a wiring board and one semiconductor chip mounted over a main surface thereof are electrically coupled with the wire. In a semiconductor device in which a chip is mounted on an upper surface of a wiring board and a bonding lead of the wiring board and a bonding pad of the chip are electrically coupled with wires, a short circuit between the neighboring wires is suppressed by making larger the diameter of the longest wire arranged in a position closest to a corner part of the chip than the diameter of the other wires.

Abstract: To suppress a short circuit between neighboring wires which is caused when the loop of a wire is formed into multiple stages in a semiconductor device in which a wiring board and one semiconductor chip mounted over a main surface thereof are electrically coupled with the wire. In a semiconductor device in which a chip is mounted on an upper surface of a wiring board and a bonding lead of the wiring board and a bonding pad of the chip are electrically coupled with wires, a short circuit between the neighboring wires is suppressed by making larger the diameter of the longest wire arranged in a position closest to a corner part of the chip than the diameter of the other wires.

Abstract: To suppress a short circuit between neighboring wires which is caused when the loop of a wire is formed into multiple stages in a semiconductor device in which a wiring board and one semiconductor chip mounted over a main surface thereof are electrically coupled with the wire. In a semiconductor device in which a chip is mounted on an upper surface of a wiring board and a bonding lead of the wiring board and a bonding pad of the chip are electrically coupled with wires, a short circuit between the neighboring wires is suppressed by making larger the diameter of the longest wire arranged in a position closest to a corner part of the chip than the diameter of the other wires.

Abstract: To suppress a short circuit between neighboring wires which is caused when the loop of a wire is formed into multiple stages in a semiconductor device in which a wiring board and one semiconductor chip mounted over a main surface thereof are electrically coupled with the wire. In a semiconductor device in which a chip is mounted on an upper surface of a wiring board and a bonding lead of the wiring board and a bonding pad of the chip are electrically coupled with wires, a short circuit between the neighboring wires is suppressed by making larger the diameter of the longest wire arranged in a position closest to a corner part of the chip than the diameter of the other wires.