Patents by Inventor Yukio Endo

Yukio Endo has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10746163
    Abstract: A variable capacity compressor includes a compression chamber that compresses a working fluid, an inlet chamber to house the working fluid to be compressed, a discharge chamber to house the working fluid compressed in the compression chamber and discharged therefrom, a control pressure chamber to house a swash plate rotating in accordance with a rotation of the drive shaft, a supply passage to facilitate communication between the discharge chamber and the control pressure chamber, a bleed passage to facilitate communication between the control pressure chamber and the inlet chamber, a first control valve including a first valve portion to adjust an opening degree of the supply passage, a second control valve provided on the bleed passage and including a spool housing recess formed on the bleed passage, and a back pressure chamber between the spool and a bottom of the spool housing recess.
    Type: Grant
    Filed: June 28, 2016
    Date of Patent: August 18, 2020
    Assignee: Valeo Japan Co., Ltd.
    Inventors: Masanori Amemori, Kentaro Suzuki, Takeshi Konishi, Changheon Ohk, Takayuki Endo, Yukio Kazahaya
  • Patent number: 10620757
    Abstract: An input device includes a casing having a recess in its inner surface, and a pressure-sensitive sensor disposed in the recess. The pressure-sensitive sensor is fixed in the recess so that a sensing surface of the pressure-sensitive sensor and a bottom surface of the recess are in contact with each other.
    Type: Grant
    Filed: January 26, 2016
    Date of Patent: April 14, 2020
    Assignee: Sony Corporation
    Inventors: Yoshiteru Taka, Takeshi Koizumi, Tomoki Kawabata, Munetake Ebihara, Tatsuya Nakazawa, Machiko Endo, Takuya Goto, Keiichi Nakamura, Yukio Sakakibara
  • Patent number: 7623170
    Abstract: An image pickup apparatus comprising an array of unit cells, vertical signal lines, and a control circuit. The unit cells are arranged in rows and columns. Each unit cell has a light-receiving device for receiving light and generating an electric charge corresponding to the light, a charge-accumulating section for accumulating the electric charge generated by the light-receiving device, a transfer device for transferring the electric charge from the light-receiving device to the charge-accumulating section, and a charge-limiting device for limiting the electric charge accumulated in the charge-accumulating section. The vertical signal lines extend along the columns of unit cells, respectively, each for receiving a electric data item corresponding to the electric charge accumulated in the charge-accumulating section of any unit cell of the associated column.
    Type: Grant
    Filed: June 17, 2005
    Date of Patent: November 24, 2009
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Nobuo Nakamura, Yoriko Tanaka, Yoshitaka Egawa, Shinji Ohsawa, Tadashi Sugiki, Yukio Endo
  • Patent number: 7472149
    Abstract: A look-up table outputs an initial value, an inclination of a straight line and a correction value in response to an entry-of a high-order bit string of an operand. An offset circuit calculates an offset of the low-order bit string. A correction circuit outputs the initial value obtained by adding the correction value to at least one of the initial value and the inclination when the correction is necessary. A multiplier calculates a product of the inclination and the offset. An adder calculates the sum of the initial value and the product.
    Type: Grant
    Filed: August 25, 2004
    Date of Patent: December 30, 2008
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Yukio Endo
  • Patent number: 7362366
    Abstract: In a CMOS image sensor, current leakage after a series of noise removing operations has been completed is suppressed in a read operation for each horizontal line, thereby suppressing image noise occurring on the output display screen of the image sensor. There are provided signal storage regions for storing the signals read from the unit cells in the same row selected in the imaging area onto vertical signal lines and horizontal select transistors for sequentially selecting and reading the signals stored in the individual signal storage regions and transferring them to read horizontal signal lines. At least in the period during which the signals are read from the signal storage regions, one of the drain and source of the transistor electrically connected to the signal path between the vertical signal line and horizontal signal line is biased in the reverse direction with respect to the substrate region. Two adjacent ones of the horizontal select transistors form a pair.
    Type: Grant
    Filed: June 25, 2004
    Date of Patent: April 22, 2008
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Yoshitaka Egawa, Yoriko Tanaka, Shinji Ohsawa, Yukio Endo, Hiromi Kusakabe, Nagataka Tanaka
  • Patent number: 7292276
    Abstract: In a CMOS image sensor, current leakage after a series of noise removing operations has been completed is suppressed in a read operation for each horizontal line, thereby suppressing image noise occurring on the output display screen of the image sensor. There are provided signal storage regions for storing the signals read from the unit cells in the same row selected in the imaging area onto vertical signal lines and horizontal select transistors for sequentially selecting and reading the signals stored in the individual signal storage regions and transferring them to read horizontal signal lines. At least in the period during which the signals are read from the signal storage regions, one of the drain and source of the transistor electrically connected to the signal path between the vertical signal line and horizontal signal line is biased in the reverse direction with respect to the substrate region. Two adjacent ones of the horizontal select transistors form a pair.
    Type: Grant
    Filed: June 25, 2004
    Date of Patent: November 6, 2007
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Yoshitaka Egawa, Yoriko Tanaka, Shinji Ohsawa, Yukio Endo, Hiromi Kusakabe, Nagataka Tanaka
  • Patent number: 7040366
    Abstract: A tubeless pneumatic tire is provided including a carcass having a carcass cord web and topping rubber layers covering the opposite sides of the carcass cord web, the carcass extending from a tread portion through a sidewall portion to a bead portion and turned up around a bead core outwardly from the inside of the tire in the axial direction of the tire, wherein only the inner one of the topping rubber layers which faces the inside of the tire is made of a butyl-based rubber. The tubeless pneumatic tire is of lightened weight and exhibits anti-airleak property comparable or superior to that of conventional one even if it is provided with no inner liner.
    Type: Grant
    Filed: July 14, 2003
    Date of Patent: May 9, 2006
    Assignee: Sumitomo Rubber Industries Limited
    Inventors: Nobuaki Minami, Kazuya Suzuki, Yukio Endo
  • Patent number: 6999120
    Abstract: Disclosed is a solid-state imaging device comprising pickup circuit formed by the arrangement of a unit cell in two dimensions, a plurality of reading lines provided in a horizontal direction corresponding to each pixel row in the pickup region to transmit the reading drive signal ?READi for driving each reading circuit of the unit cell of respectively corresponding pixel row, a vertical drive selection circuit configured to drive the reading circuit by selectively supplying the reading drive signal to these reading lines, and first row selection circuit and a second row selection circuit configured to control the vertical drive circuit so as to drive reading circuit of each pixel row on the basis of the first pulse and the second pulse ?ROREAD and ?ESREAD respectively. The solid-state imaging device is capable of controlling a minimum electric charge accumulation time in the photodiode to less than 1H (a horizontal cycle) and is capable of conducting an extremely high-speed shutter operation.
    Type: Grant
    Filed: October 6, 2000
    Date of Patent: February 14, 2006
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Yoshitaka Egawa, Shinji Ohsawa, Yukio Endo, Nobuo Nakamura
  • Publication number: 20050231619
    Abstract: An image pickup apparatus comprising an array of unit cells, vertical signal lines, and a control circuit. The unit cells are arranged in rows and columns. Each unit cell has a light-receiving device for receiving light and generating an electric charge corresponding to the light, a charge-accumulating section for accumulating the electric charge generated by the light-receiving device, a transfer device for transferring the electric charge from the light-receiving device to the charge-accumulating section, and a charge-limiting device for limiting the electric charge accumulated in the charge-accumulating section. The vertical signal lines extend along the columns of unit cells, respectively, each for receiving a electric data item corresponding to the electric charge accumulated in the charge-accumulating section of any unit cell of the associated column.
    Type: Application
    Filed: June 17, 2005
    Publication date: October 20, 2005
    Inventors: Nobuo Nakamura, Yoriko Tanaka, Yoshitaka Egawa, Shinji Ohsawa, Tadashi Sugiki, Yukio Endo
  • Patent number: 6954547
    Abstract: A method for obtaining spectral sensitivity characteristics of a color image input device such as a color scanner or a like is provided. The most optimum spectral sensitivity characteristics of the color image input device can be obtained by amending CIE XYZ color matching functions so that X, Y and Z values of two color stimuli perceived to be the same in color by observation under a specific illuminant are made equal and by performing linear transformation on the amended color matching function.
    Type: Grant
    Filed: October 26, 2001
    Date of Patent: October 11, 2005
    Assignee: Oki Data Corporation
    Inventors: Nobuhito Matsushiro, Yukio Endo
  • Patent number: 6947087
    Abstract: A solid-state imaging device includes unit cells, arranged in a matrix of rows and columns, each having a photodiode for photoelectrically converting incident light to store signal charges, a readout transistor Td for reading out the signal charges and amplifying transistor Tb for amplifying signals readout at a detection node, a plurality of vertical shift registers for generating signal charge readout pulses ESi, DRi, ROi and a voltage switching circuit for setting a voltage VDR of the readout pulse DRi for dynamic range control lower than voltages of both a readout pulse ESi for an electronic shutter and a usual readout pulse ROi. The solid-state imaging device provides excellent images without clipping from a small signal region to large signal region.
    Type: Grant
    Filed: December 28, 2000
    Date of Patent: September 20, 2005
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Yoshitaka Egawa, Shinji Ohsawa, Yukio Endo, Nobuo Nakamura
  • Patent number: 6930722
    Abstract: An image pickup apparatus comprising an array of unit cells, vertical signal lines, and a control circuit. The unit cells are arranged in rows and columns. Each unit cell has a light-receiving device for receiving light and generating an electric charge corresponding to the light, a charge-accumulating section for accumulating the electric charge generated by the light-receiving device, a transfer device for transferring the electric charge from the light-receiving device to the charge-accumulating section, and a charge-limiting device for limiting the electric charge accumulated in the charge-accumulating section. The vertical signal lines extend along the columns of unit cells, respectively, each for receiving a electric data item corresponding to the electric charge accumulated in the charge-accumulating section of any unit cell of the associated column.
    Type: Grant
    Filed: June 29, 1999
    Date of Patent: August 16, 2005
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Nobuo Nakamura, Yoriko Tanaka, Yoshitaka Egawa, Shinji Ohsawa, Tadashi Sugiki, Yukio Endo
  • Publication number: 20050160129
    Abstract: A look-up table outputs an initial value, an inclination of a straight line and a correction value in response to an entry-of a high-order bit string of an operand. An offset circuit calculates an offset of the low-order bit string. A correction circuit outputs the initial value obtained by adding the correction value to at least one of the initial value and the inclination when the correction is necessary. A multiplier calculates a product of the inclination and the offset. An adder calculates the sum of the initial value and the product.
    Type: Application
    Filed: August 25, 2004
    Publication date: July 21, 2005
    Applicant: Kabushiki Kaisha Toshiba
    Inventor: Yukio Endo
  • Patent number: 6903768
    Abstract: In a solid state image sensor device comprising a cell area wherein unit cells each having photoelectric diodes are arranged in a matrix form on a semiconductor substrate, the cell area being composed of a photo-sensitive pixel region for sensing an image, and an optical black pixel region for defining an optical black level, and a vertical shift register for selecting the unit cells of the image sensing cell array, in a group along each of horizontal lines, and vertical signal lines, each of which reads each of signals from the unit cells selected by turning on an address register by means of the vertical shift register, the vertical signal lines in the optical black pixel region are connected with each other through a wiring.
    Type: Grant
    Filed: July 8, 1999
    Date of Patent: June 7, 2005
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Shinji Ohsawa, Yukio Endo, Yoshitaka Egawa
  • Patent number: 6882377
    Abstract: The liquid crystal display of the present invention includes: a first insulating substrate as an array substrate; display pixels formed in such a manner as to be arranged in array like shape on the first insulating substrate, said display pixels having pixel electrodes electrically connected to each other; a counter substrate formed on a second insulating substrate on which common electrodes are formed; a liquid crystal layer interposed between the first insulating substrate and the second insulating substrate, the first insulating substrate and the second insulating substrate being bonded each other; a transfer electrode for supplying a common electrical potential to common electrodes on the second insulating substrate through a conductive material; wherein the transfer electrode is formed by patterning a conductive thin film that has been formed by the last conductive film forming process of the first insulating substrate; wherein a second conductive metal film, which has been formed in the second conductiv
    Type: Grant
    Filed: December 17, 2003
    Date of Patent: April 19, 2005
    Assignee: Advanced Display Inc.
    Inventors: Satoshi Kohtaka, Takafumi Hashiguchi, Yukio Endo
  • Patent number: 6836301
    Abstract: The liquid crystal display of the present invention includes: a first insulating substrate as an array substrate; display pixels formed in such a manner as to be arranged in array like shape on the first insulating substrate, said display pixels having pixel electrodes electrically connected to each other; a counter substrate formed on a second insulating substrate on which common electrodes are formed; a liquid crystal layer interposed between the first insulating substrate and the second insulating substrate, the first insulating substrate and the second insulating substrate being bonded each other; a transfer electrode for supplying a common electrical potential to common electrodes on the second insulating substrate through a conductive material; wherein the transfer electrode is formed by patterning a conductive thin film that has been formed by the last conductive film forming process of the first insulating substrate; wherein a second conductive metal film, which has been formed in the second conductiv
    Type: Grant
    Filed: December 11, 2003
    Date of Patent: December 28, 2004
    Assignee: Advanced Display Inc.
    Inventors: Satoshi Kohtaka, Takafumi Hashiguchi, Yukio Endo
  • Publication number: 20040233309
    Abstract: In a CMOS image sensor, current leakage after a series of noise removing operations has been completed is suppressed in a read operation for each horizontal line, thereby suppressing image noise occurring on the output display screen of the image sensor. There are provided signal storage regions for storing the signals read from the unit cells in the same row selected in the imaging area onto vertical signal lines and horizontal select transistors for sequentially selecting and reading the signals stored in the individual signal storage regions and transferring them to read horizontal signal lines. At least in the period during which the signals are read from the signal storage regions, one of the drain and source of the transistor electrically connected to the signal path between the vertical signal line and horizontal signal line is biased in the reverse direction with respect to the substrate region. Two adjacent ones of the horizontal select transistors form a pair.
    Type: Application
    Filed: June 25, 2004
    Publication date: November 25, 2004
    Inventors: Yoshitaka Egawa, Yoriko Tanaka, Shinji Ohsawa, Yukio Endo, Hiromi Kusakabe, Nagataka Tanaka
  • Publication number: 20040233310
    Abstract: In a CMOS image sensor, current leakage after a series of noise removing operations has been completed is suppressed in a read operation for each horizontal line, thereby suppressing image noise occurring on the output display screen of the image sensor. There are provided signal storage regions for storing the signals read from the unit cells in the same row selected in the imaging area onto vertical signal lines and horizontal select transistors for sequentially selecting and reading the signals stored in the individual signal storage regions and transferring them to read horizontal signal lines. At least in the period during which the signals are read from the signal storage regions, one of the drain and source of the transistor electrically connected to the signal path between the vertical signal line and horizontal signal line is biased in the reverse direction with respect to the substrate region. Two adjacent ones of the horizontal select transistors form a pair.
    Type: Application
    Filed: June 25, 2004
    Publication date: November 25, 2004
    Inventors: Yoshitaka Egawa, Yoriko Tanaka, Shinji Ohsawa, Yukio Endo, Hiromi Kusakabe, Nagataka Tanaka
  • Patent number: 6801256
    Abstract: In a CMOS image sensor, current leakage after a series of noise removing operations has been completed is suppressed in a read operation for each horizontal line, thereby suppressing image noise occurring on the output display screen of the image sensor. There are provided signal storage regions for storing the signals read from the unit cells in the same row selected in the imaging area onto vertical signal lines and horizontal select transistors for sequentially selecting and reading the signals stored in the individual signal storage regions and transferring them to read horizontal signal lines. At least in the period during which the signals are read from the signal storage regions, one of the drain and source of the transistor electrically connected to the signal path between the vertical signal line and horizontal signal line is biased in the reverse direction with respect to the substrate region. Two adjacent ones of the horizontal select transistors form a pair.
    Type: Grant
    Filed: June 1, 1999
    Date of Patent: October 5, 2004
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Yoshitaka Egawa, Yoriko Tanaka, Shinji Ohsawa, Yukio Endo, Hiromi Kusakabe, Nagataka Tanaka
  • Publication number: 20040125318
    Abstract: The liquid crystal display of the present invention includes: a first insulating substrate as an array substrate; display pixels formed in such a manner as to be arranged in array like shape on the first insulating substrate, said display pixels having pixel electrodes electrically connected to each other; a counter substrate formed on a second insulating substrate on which common electrodes are formed; a liquid crystal layer interposed between the first insulating substrate and the second insulating substrate, the first insulating substrate and the second insulating substrate being bonded each other; a transfer electrode for supplying a common electrical potential to common electrodes on the second insulating substrate through a conductive material; wherein the transfer electrode is formed by patterning a conductive thin film that has been formed by the last conductive film forming process of the first insulating substrate; wherein a second conductive metal film, which has been formed in the second conductiv
    Type: Application
    Filed: December 17, 2003
    Publication date: July 1, 2004
    Applicant: ADVANCED DISPLAY INC.
    Inventors: Satoshi Kohtaka, Takafumi Hashiguchi, Yukio Endo