Patents by Inventor Yukio Hosoda

Yukio Hosoda has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6475858
    Abstract: There are contained the steps of leaving selectively the first insulating film that covers respective gate electrodes in the first region and the second region and the semiconductor substrate on side surfaces of the second gate electrode by etching back the first insulating film only in the second region, forming the second insulating film that is formed of same material as the first insulating film in the first region and the second region, forming the third insulating film whose selective etching to the first insulating film can be performed, forming holes to expose the semiconductor substrate by etching the first to third insulating films between the gate electrode in the first region, forming plugs in the holes, forming the fourth insulating film to cover the plugs and the third insulating film, forming a plurality of holes in the first region and the second region by patterning the fourth insulating film to the second insulating film.
    Type: Grant
    Filed: February 19, 2002
    Date of Patent: November 5, 2002
    Assignee: Fujitsu Limited
    Inventors: Koichi Sugiyama, Yukio Hosoda, Shinichiroh Ikemasu
  • Publication number: 20020100980
    Abstract: There are contained the steps of leaving selectively the first insulating film that covers respective gate electrodes in the first region and the second region and the semiconductor substrate on side surfaces of the second gate electrode by etching back the first insulating film only in the second region, forming the second insulating film that is formed of same material as the first insulating film in the first region and the second region, forming the third insulating film whose selective etching to the first insulating film can be performed, forming holes to expose the semiconductor substrate by etching the first to third insulating films between the gate electrode in the first region, forming plugs in the holes, forming the fourth insulating film to cover the plugs and the third insulating film, forming a plurality of holes in the first region and the second region by patterning the fourth insulating film to the second insulating film.
    Type: Application
    Filed: February 19, 2002
    Publication date: August 1, 2002
    Applicant: FUJITSU LIMITED
    Inventors: Koichi Sugiyama, Yukio Hosoda, Shinichiroh Ikemasu
  • Patent number: 6384441
    Abstract: There are contained the steps of leaving selectively the first insulating film that covers respective gate electrodes in the first region and the second region and the semiconductor substrate on side surfaces of the second gate electrode by etching back the first insulating film only in the second region, forming the second insulating film that is formed of same material as the first insulating film in the first region and the second region, forming the third insulating film whose selective etching to the first insulating film can be performed, forming holes to expose the semiconductor substrate by etching the first to third insulating films between the gate electrode in the first region, forming plugs in the holes, forming the fourth insulating film to cover the plugs and the third insulating film, forming a plurality of holes in the first region and the second region by patterning the fourth insulating film to the second insulating film.
    Type: Grant
    Filed: December 7, 2000
    Date of Patent: May 7, 2002
    Assignee: Fujitsu Limited
    Inventors: Koichi Sugiyama, Yukio Hosoda, Shinichiroh Ikemasu
  • Publication number: 20020030209
    Abstract: There are contained the steps of leaving selectively the first insulating film that covers respective gate electrodes in the first region and the second region and the semiconductor substrate on side surfaces of the second gate electrode by etching back the first insulating film only in the second region, forming the second insulating film that is formed of same material as the first insulating film in the first region and the second region, forming the third insulating film whose selective etching to the first insulating film can be performed, forming holes to expose the semiconductor substrate by etching the first to third insulating films between the gate electrode in the first region, forming plugs in the holes, forming the fourth insulating film to cover the plugs and the third insulating film, forming a plurality of holes in the first region and the second region by patterning the fourth insulating film to the second insulating film.
    Type: Application
    Filed: December 7, 2000
    Publication date: March 14, 2002
    Inventors: Koichi Sugiyama, Yukio Hosoda, Shinichiroh Ikemasu
  • Patent number: 5946557
    Abstract: A semiconductor device comprises a plurality of wiring formed on a lower insulating film to be spaced apart from each other, dummy patterns formed on the lower insulating layer between the plurality of wiring and spaced apart from each other, and an upper insulating layer formed to cover the plurality of wiring and the dummy patterns and having therein cavities formed in regions between the plurality of wiring and the dummy patterns.
    Type: Grant
    Filed: April 11, 1997
    Date of Patent: August 31, 1999
    Assignee: Fujitsu Ltd.
    Inventors: Yukio Hosoda, Masaaki Ichikawa
  • Patent number: 5652465
    Abstract: A semiconductor device comprises a plurality of wiring formed on a lower insulating film to be spaced apart from each other, dummy patterns formed on the lower insulating layer between the plurality of wiring and spaced apart from each other, and an upper insulating layer formed to cover the plurality of wiring and the dummy patterns and having cavities formed in regions between the plurality of wiring and the dummy patterns.
    Type: Grant
    Filed: October 18, 1995
    Date of Patent: July 29, 1997
    Assignee: Fujitsu Limited
    Inventors: Yukio Hosoda, Masaaki Ichikawa
  • Patent number: 4609589
    Abstract: A one-faced or double-faced release sheet presenting an adequate barrier against coating solutions of release agent, good adhesion to release agents, high heat resistance and minimum heat shrinkage comprising a support sheet having a release layer formed on at least one side thereof with an undercoated layer being disposed between said support sheet and the release layer, said undercoated layer being formed from a mixture of a soap-free type acrylic resin emulsion and oxidized starch.
    Type: Grant
    Filed: January 14, 1985
    Date of Patent: September 2, 1986
    Assignee: Oji Paper Company, Ltd.
    Inventors: Yukio Hosoda, Hiro Ohtsubo, Hiroyuki Yamada