Abstract: Method and apparatus for instruction restart processing in a microprogram-controlled data processing apparatus, wherein, in restarting an instruction execution after instruction suspension, the internal information of the data processing apparatus at the time of instruction execution suspension is saved in a memory, and after a suspension cause removal process performed the saved internal information is recovered. A check point address associated with the address of a currently executing microprogram is stored in accordance with a designation by the microprogram. After a suspension causes removal process is performed, the execution of the instruction restarts using the check point address. If a check point address has not been stored after the suspension cause removal process is performed, the execution of the instruction restarts from a read operation of the suspended instruction from the main storage.

Abstract: Method and apparatus for instruction restart processing in a microprogram - controlled data processing apparatus, wherein, in restarting an instruction execution after instruction suspension, the internal information of the data processing apparatus at the time of instruction execution suspension is saved in a memory, and after a suspension cause removal process performed the saved internal information is recovered. A check point address associated with the address of a currently executing microprogram is stored in accordance with a designation by the microprogram. After a suspension causes removal process is performed, the execution of the instruction restarts using the check point address. If a check point address has not been stored after the suspension cause removal process is performed, the execution of the instruction restarts from a read operation of the suspended instruction from the main storage.

Abstract: An electronic control apparatus includes a digital processor which receives data from a plurality of sensors which monitor conditions of the engine and supply output signals to the processor for controlling various actuators that control energy conversion functions within the engine. Control signals that are produced in response to data processing operations carried out by the processor are generated in accordance with a selective incrementing of engine timing codes that are successively compared with control data supplied by the processor in response to its processing operations. Selected ones of the control signals are employed to generate interrupts that are supplied to a status register. The contents of the status register are combined with the contents of a mask register to supply interrupts to the processor. The interrupts are assigned in accordance with prescribed levels of priority associated with the data processing operations carried out by the processor.

Abstract: In an elevator control system comprising a plurality of cars serving a plurality of floors, hall call register means provided on the landing of each floor, cage call register means provided in each car, and means for detecting the number of passenger in each car;The improvement comprising means for forecasting the number of in-cage passengers for every destination floor by allotting the detected number of in-cage passengers to the cage calls, means for detecting the number of waiting passengers provided on the landing of specified floors, means for setting the number of waiting passengers on other than the landing of the specified floors, means for sequentially adding the detected number of prospective passengers waiting on each of the specified floors that have generated the hall calls to the detected number of in-cage passengers, means for sequentially adding the setting of the number of waiting passengers on each of the floors other than the specified floors that have generated the hall calls to the number