Patents by Inventor Yukio Komatsu
Yukio Komatsu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20090152671Abstract: This method for manufacturing a SIMOX wafer includes: heating a silicon wafer to 300° C. or more and implanting oxygen ions so as to form a high oxygen concentration layer within the silicon wafer; subjecting the silicon wafer to a cooling to less than 300° C. and an implanting of oxygen ions so as to form an amorphous layer; and subjecting the silicon wafer to a heat-treating in a mixed gas atmosphere containing oxygen so as to form a buried oxide layer. In the forming of the buried oxide layer, a starting temperature is less than 1350° C. and a maximum temperature is 1350° C. or more. This SIMOX wafer is manufactured by the above method and includes a BOX layer and a SOI layer on the BOX layer. The BOX layer has a thickness of 1300 ? or more and a breakdown voltage of 7 MV/cm or more, and the surface of the SOI layer and the interface between the SOI layer and the BOX layer have a roughness over a 10-?m square area of 4 ? rms or less.Type: ApplicationFiled: February 19, 2009Publication date: June 18, 2009Applicant: Sumco CorporationInventors: Yoshiro Aoki, Yukio Komatsu, Tetsuya Nakai, Seiichi Nakamura
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Patent number: 7514343Abstract: This method for manufacturing a SIMOX wafer includes: heating a silicon wafer to 300° C. or more and implanting oxygen ions so as to form a high oxygen concentration layer within the silicon wafer; subjecting the silicon wafer to a cooling to less than 300° C. and an implanting of oxygen ions so as to form an amorphous layer; and subjecting the silicon wafer to a heat-treating in a mixed gas atmosphere containing oxygen so as to form a buried oxide layer. In the forming of the buried oxide layer, a starting temperature is less than 1350° C. and a maximum temperature is 1350° C. or more. This SIMOX wafer is manufactured by the above method and includes a BOX layer and a SOI layer on the BOX layer. The BOX layer has a thickness of 1300 ? or more and a breakdown voltage of 7 MV/cm or more, and the surface of the SOI layer and the interface between the SOI layer and the BOX layer have a roughness over a 10-?m square area of 4 ? rms or less.Type: GrantFiled: June 8, 2006Date of Patent: April 7, 2009Assignee: Sumco CorporationInventors: Yoshiro Aoki, Yukio Komatsu, Tetsuya Nakai, Seiichi Nakamura
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Publication number: 20080251879Abstract: Heavy metal contamination in a device process can be efficiently trapped in a substrate. The present invention comprises: a step of implanting oxygen ions into a wafer; a step of performing a first heat treatment to the wafer in a predetermined gas atmosphere at 1300 to 1390° C. to form a buried oxide layer and also form an SOI layer on a wafer front surface, the wafer before the oxygen ion implantation having an oxygen concentration of 8×1017 to 1.8×1018 atoms/cm3 (old ASTM), the buried oxide layer being formed over the entire wafer surface, the present invention being characterized by including: a step of performing a second heat treatment to the wafer subjected to the first heat treatment in a predetermined gas atmosphere at 400 to 900° C.Type: ApplicationFiled: July 11, 2005Publication date: October 16, 2008Inventors: Naoshi Adachi, Yukio Komatsu
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Publication number: 20080090384Abstract: A manufacturing method for a SIMOX substrate for obtaining a SIMOX substrate by subjecting a silicon substrate having oxygen ions implanted thereinto by heat treatment at 1300 to 1350° C. in an atmosphere of a gas mixture of argon and oxygen, the method includes: performing a pre-heat-treatment to the silicon substrate for five minutes to four hours within the temperature range of 1000° C. to 1280° C. in an atmosphere of inert gas, reducing gas, or a gas mixture of inert gas and reducing gas, after the oxygen ions are implanted and before the heat treatment is performed.Type: ApplicationFiled: July 19, 2005Publication date: April 17, 2008Inventors: Naoshi Adachi, Yukio Komatsu
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Publication number: 20070238269Abstract: It is an object of the present invention to provide a method for manufacturing SIMOX wafer, wherein roughness Rms of a measurement area of 10 square micrometers in a surface of an SOI layer and roughness Rms of a measurement area of 10 square micrometers in an interface between the SOI layer and a BOX layer can be reduced respectively and a SIMOX obtained by the method. The method is to manufacture a SIMOX wafer comprising; a step of forming a first ion-implanted layer 12 containing highly concentrated oxygen within a wafer 11; a step of forming a second ion-implanted amorphous layer 13; and a high temperature heat treatment step of transforming the first and second ion-implanted layers into a BOX layer 15 by holding the wafer at a temperature between 1300° C.Type: ApplicationFiled: April 3, 2007Publication date: October 11, 2007Inventors: Yoshiro Aoki, Riyuusuke Kasamatsu, Yukio Komatsu
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Publication number: 20070178680Abstract: A SIMOX wafer having a BOX layer with a thin film thickness is obtained without a reduction in productivity or deterioration in quality. In a method for manufacturing a SIMOX wafer comprising: a step of forming a first ion-implanted layer in a silicon wafer; a step of forming a second ion-implanted layer that is in an amorphous state; and a high-temperature heat treatment step of maintaining the wafer in an oxygen contained atmosphere at a temperature that is not lower than 1300° C. but less than a silicon melting point for 6 to 36 hours to change the first and the second ion-implanted layers into a BOX layer, a gas containing chlorine that is not less than 0.1 volume % but less than 1.0 volume % is mixed into an atmosphere during temperature elevation in the high-temperature heat treatment.Type: ApplicationFiled: February 2, 2007Publication date: August 2, 2007Inventors: Yoshiro Aoki, Yukio Komatsu, Tetsuya Nakai, Seiichi Nakamura
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Patent number: 7208781Abstract: A semiconductor device which includes fuses for relieving defective areas in the semiconductor device is described. There is provided a semiconductor device including a semiconductor substrate having a circuit element, an insulating layer provided on the semiconductor substrate, a fuse element formed in the insulating layer, the fuse element including at least two fuse units connected in series, each of the fuse units having a resistor and a fuse connected in parallel, the fuse disposed above the resistor.Type: GrantFiled: September 15, 2004Date of Patent: April 24, 2007Assignee: Kabushiki Kaisha ToshibaInventors: Yukio Komatsu, Hajime Koyama
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Publication number: 20060281233Abstract: This method for manufacturing a SIMOX wafer includes: heating a silicon wafer to 300° C. or more and implanting oxygen ions so as to form a high oxygen concentration layer within the silicon wafer; subjecting the silicon wafer to a cooling to less than 300° C. and an implanting of oxygen ions so as to form an amorphous layer; and subjecting the silicon wafer to a heat-treating in a mixed gas atmosphere containing oxygen so as to form a buried oxide layer. In the forming of the buried oxide layer, a starting temperature is less than 1350° C. and a maximum temperature is 1350° C. or more. This SIMOX wafer is manufactured by the above method and includes a BOX layer and a SOI layer on the BOX layer. The BOX layer has a thickness of 1300 ? or more and a breakdown voltage of 7 MV/cm or more, and the surface of the SOI layer and the interface between the SOI layer and the BOX layer have a roughness over a 10-?m square area of 4 ? rms or less.Type: ApplicationFiled: June 8, 2006Publication date: December 14, 2006Inventors: Yoshiro Aoki, Yukio Komatsu, Tetsuya Nakai, Seiichi Nakamura
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Publication number: 20060189169Abstract: A method is provided for the heat treatment of low oxygen concentration silicon wafers obtained from a silicon single crystal produced by the Czochralski process. The method comprises high-temperature oxidation heat treatment for the formation of a high oxygen concentration region under the wafer surface and the subsequent oxygen precipitation heat treatment. The high-temperature oxidation heat treatment can cause inward diffusion of oxygen from the wafer surface to form a region increased in oxygen concentration under the wafer surface, and the subsequent oxygen precipitation heat treatment can form a DZ layer on the wafer surface and stably form oxygen precipitates optimal in size within the wafer at a high density, so that excellent gettering effects can be produced.Type: ApplicationFiled: February 17, 2006Publication date: August 24, 2006Inventors: Naoshi Adachi, Yukio Komatsu
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Publication number: 20050098803Abstract: A semiconductor device which includes fuses for relieving defective areas in the semiconductor device is described. There is provided a semiconductor device including a semiconductor substrate having a circuit element, an insulating layer provided on the semiconductor substrate, a fuse element formed in the insulating layer, the fuse element including at least two fuse units connected in series, each of the fuse units having a resistor and a fuse connected in parallel, the fuse disposed above the resistor.Type: ApplicationFiled: September 15, 2004Publication date: May 12, 2005Inventors: Yukio Komatsu, Hajime Koyama
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Publication number: 20020174037Abstract: The present invention provides a data processing method for a parts supply management system for supplying a volume of parts which is neither excessive nor short by maintaining a close relationship between a user and a supplier. In the data processing method, a supplier side server (10) receives parts utilization forecast information and order information from a user side server (20) via a network (1), stores the parts utilization forecast information and the order information, obtains production arrangement information based on the parts utilization forecast information, obtains stock forecast information based on the parts utilization forecast information or the order information, and obtains supplement information based on the parts utilization forecast information and the stock forecast information.Type: ApplicationFiled: October 4, 2001Publication date: November 21, 2002Inventors: Hidenori Tonouchi, Yukio Komatsu
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Patent number: 5942176Abstract: Synthtic fibers can be effectively lubricated by applying a lubricant containing polyether polyester block copolymer shown as follows: ##STR1## where X, Z, A.sup.1, Y.sup.1, and R.sup.1 are each of a specified structure and integers a, b, c, p and q satisfy certain conditions.Type: GrantFiled: December 22, 1997Date of Patent: August 24, 1999Assignee: Takemoto Yushi Kabushiki KaishaInventors: Tsukasa Fujii, Michiharu Nagai, Yukio Komatsu, Yasushi Maeshima
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Patent number: 5916474Abstract: Synthetic fibers are processed under a specified condition by applying a lubricant containing a polyether polyester nitrogenous compound with numerically averaged molecular weight 500-20000 obtained by ring-opening polymerization of hydroxyl group of fatty alkanol nitrogenous compound of a specified kind with alkylene oxide with 2-4 carbon atoms to form polyalkoxylated block and ring-opening polymerization of end hydroxyl group of this polyalkoxylated block with .epsilon.-caprolactone to form polycarbonylpentoxy block. An acylated polyether polyester nitrogenous compound obtainable by acylating such polyether polyester nitrogenous compound with an acylation reagent of a specified kind may also be used as the lubricant. The lubricant may further contain aliphatic ester of a specified kind at a specified ratio.Type: GrantFiled: January 23, 1998Date of Patent: June 29, 1999Assignee: Takemoto Yushi Kabushiki KaishaInventors: Tsukasa Fujii, Yukio Komatsu, Yasushi Maeshima
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Patent number: 5646616Abstract: To display picking information on a liquid crystal display unit, ID tags are disposed at the entrance and the exits of paths between racks, and the current position of a picking cart is recognized by way of communication with an antenna. Between an entrance and an exit, the distance over which the picking cart has traveled from the communication position with an ID tag is detected by way of an encoder which detects rotation of a wheel of the picking cart to recognize the current position.Type: GrantFiled: June 26, 1995Date of Patent: July 8, 1997Assignee: Murata Kikai Kabushiki KaishaInventor: Yukio Komatsu
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Patent number: 4855656Abstract: An electroconductive guide line is laid along a travelling path of a driverless car on the ground side, while on the driverless car side are provided a means for inducing electromotive force in the guide line and a means for detecting a magnetic field created upon generation of an electric current in the guide line.Type: GrantFiled: August 6, 1987Date of Patent: August 8, 1989Assignee: Murata Kikai Kabushiki KaishaInventors: Yoshihiro Saitoh, Minoru Kondoh, Yukio Komatsu