Abstract: An image processing device including an image processing section having one or more image processing modules and buffer modules having a buffer is provided. The buffer module, recognizes a number of image processing modules which are connected at the following stage of its own module; stores, for each of the following image processing modules, a head position of un-read image data among image data which is stored in the buffer; and each time image data is requested from an following image processing module, causes the image processing module to read, in a read data amount which is set in advance for its own module at each of the individual following image processing modules or which is designated each time of the request, image data which is stored in the buffer, from the head position corresponding to the image processing module.

Abstract: An image processing device including an image processing section having: one or more image processing modules, each image processing module having an image processing engine and a control section; and one or more buffer modules having a buffer for storing image data. The image processing module is realized by a program, which corresponds to the image processing engine, and a program, which corresponds to the control section, being executed by a CPU of the image processing device, and a portion of or an entirety of the program corresponding to the control section is used in common for, among the plurality of types of image processing modules, image processing modules whose units of writing image data to the buffer of the buffer module connected at the following stage of its own module are the same.

Abstract: An image processing device has an image processing section. The image processing section has one or more image processing modules and one or more buffer modules. Each image processing module has an image processing engine and a control section. The image processing engine carries out an image processing on image data in units of a unit processing data amount. The control section inputs the image data to the image processing engine. The one or more image processing modules is selected from a plurality of the image processing modules for carrying out the image processing by the image processing engine, and the buffer module is connected to at least one of an image processing module which is selected.

Abstract: A document image processing device can correct the location of a document of an arbitrary format. The reference position of a document image is designated previously by a reference position designation unit. The document image is input per page and stored. A predetermined pixel block extraction unit extracts the predetermined pixel block appearing commonly on each page, and the coordinate value of the predetermined pixel block is supplied to a difference extraction unit. The difference extraction unit calculates the difference value between the position of the extracted predetermined pixel block and the reference position designated by the reference position designation unit, and supplies the difference value to an image shifting unit. The image shifting unit shifts the document image of that page based on the difference value, and corrects the location of the document image. The predetermined pixel block used for position correction can be set arbitrarily.

Abstract: In a pipeline process structure having a plurality of processing functions 131-1 to 131-N which are connected to each other in a pipeline mode so as to execute predetermined process operations, while an image information read-skipping unit 132 for skipping a reading operation of a portion of image information to be processed is provided with at least one of these plural processing functions 131-1 to 131-N, when the image information is processed on such a system for requiring/releasing a memory, the image information can be effectively processed and acquired.

Abstract: In a pipeline process in which plural image processing sections (image processing modules), for example, an image inputting section 131, a histogram producing section 132, and a binarizing section 133 are connected in a pipeline manner, each of the image processing sections 131, 132, and 133 is provided with a function of reinitializing a state to cause each process to be again performed with being started from the beginning of an image, whereby image data to be processed can be reread.

Abstract: A document image processing device can correct the location of a document of an arbitrary format. The reference position of a document image is designated previously by a reference position designation unit. The document image is input per page and stored. A predetermined pixel block extraction unit extracts the predetermined pixel block appearing commonly on each page, and the coordinate value of the predetermined pixel block is supplied to a difference extraction unit. The difference extraction unit calculates the difference value between the position of the extracted predetermined pixel block and the reference position designated by the reference position designation unit, and supplies the difference value to an image shifting unit. The image shifting unit shifts the document image of that page based on the difference value, and corrects the location of the document image. The predetermined pixel block used for position correction can be set arbitrarily.

Abstract: A plurality of system buses are provided in association with multiple processors and a memory, respectively. Registers are provided between the system buses so that a packet signal can be sent, in a pipelined form, to bus interfaces connected to the respective system buses. Each bus interface is assigned its own ID value. Counting the number of ID values cyclically at the rise of a clock signal, each register asserts a bus-ID match signal when finding coincidence of the bus-ID value. In response to the asserting of the bus-ID match signal, the associated bus interface provides the packet signal to the system bus. When the bus-ID signal is negated, the associated bus interface takes in the packet signal from the system bus.