Patents by Inventor Yukio Naruke

Yukio Naruke has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5395770
    Abstract: A method of controlling a misfit dislocation in a process of producing an epitaxial semiconductor wafer comprising a semiconductor substrate and an epitaxial layer deposited on the semiconductor substrate, an impurity concentration of the epitaxial layer differing from that of the semiconductor substrate, has the step of controlling the amount of an extrinsic strain caused on the back surface of the semiconductor substrate prior to the step of depositing the epitaxial layer, thereby controlling an occurrence of misfit dislocation caused in and near the interface between the semiconductor substrate and the epitaxial layer.
    Type: Grant
    Filed: August 6, 1993
    Date of Patent: March 7, 1995
    Assignee: Shin-Etsu Handotai Co., Ltd.
    Inventors: Katsuhiko Miki, Yukio Naruke