Patents by Inventor Yukio Okazaki
Yukio Okazaki has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240295353Abstract: A refrigeration cycle apparatus includes an air conditioner, sensors, and processing circuitry. The processing circuitry determines a predicted opening of the electronic expansion valve of the air conditioner based on outputs of the sensors and an operation frequency of the compressor, assuming normal operation of the air conditioner. The processing circuitry calculates a prediction error by subtracting a measured opening of the electronic expansion valve from the predicted opening. The processing circuitry calculates multiple prediction errors in advance, calculates an offset value as an average of the multiple prediction error, and outputs a corrected prediction error by subtracting the offset value from the current prediction error. The processing circuitry detects a refrigerant leak of the air conditioner based on the corrected prediction error.Type: ApplicationFiled: June 22, 2021Publication date: September 5, 2024Applicant: TOSHIBA CARRIER CORPORATIONInventors: Shinya KOMURE, Morio HIRAHARA, Yukio KIGUCHI, Noriomi OKAZAKI
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Publication number: 20240254911Abstract: A cooling device of a vehicle is provided, which includes a transmission, a first coolant circuit where a first coolant which cools the internal combustion engine circulates, a second coolant circuit independent from the first coolant circuit, where a second coolant which cools the electric drive system circulates, and a fluid circuit where fluid which lubricates and cools friction engagement elements in the transmission circulates. The fluid circuit includes a first heat exchanger which exchanges heat between the fluid and the first coolant, a second heat exchanger in-series with the first heat exchanger which exchanges heat between the fluid and the second coolant, a first adjuster which changes a flow rate of the fluid passing through the first heat exchanger, and a second adjuster which changes a flow rate of the fluid passing through the second heat exchanger.Type: ApplicationFiled: January 11, 2024Publication date: August 1, 2024Inventors: Keitaro Kageyama, Shinichi Hikitani, Tomohiro Koguchi, Yukio Jo, Daisuke Shimo, Masahiro Miyazaki, Daisuke Fukuda, Akira Tsuda, Kenji Tanaka, Kazufumi Kumakura, Hiroaki Gotan, Takahiro Okazaki, Kenta Honda, Yoshie Kakuda, Toshiaki Tohoda, Kenta Kobayashi, Aki Murai, Michiyuki Miura, Yusaku Takahashi, Masaki Yamamoto
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Patent number: 10761201Abstract: An object detection device includes: a classifier that receives, from a radar device that transmits a transmission wave and receives a reflected wave that is the transmission wave reflected by an object around a subject vehicle, detection result information indicative of an intensity, an azimuth, and a Doppler velocity obtained from a Doppler frequency shift of the reflected wave, and determines whether the detection result information is first detection result information corresponding to a moving object or second detection result information corresponding to a still object; a calculator that calculates distances from the radar device to reflection points of the moving object on the basis of the first detection result information; and an output that supplies, to a predetermined device, first reflection point information indicating the distances of the reflection points and azimuths of the reflection points based on the radar device.Type: GrantFiled: December 7, 2017Date of Patent: September 1, 2020Assignee: Panasanic Intellectul Property Management Co., Ltd.Inventors: Yukio Okazaki, Hirofumi Nishimura, Asako Hamada
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Patent number: 10243640Abstract: Provided is a phased array transmission device including: a plurality of transmission branches, each being provided with a phase shift unit that applies a phase rotation to a baseband signal, a DC offset correction unit that adds a first correction value to an output signal of the phase shift unit, and a mixer that subjects an output signal of the DC offset correction unit to a frequency conversion to a high frequency band; and a correction control unit that calculates a second correction value with which a carrier leak component included in an output signal of the mixer is minimized, for each of a plurality of candidates for a phase rotation amount that is set for the phase rotation, and determines the first correction value on the basis of the second correction value.Type: GrantFiled: March 9, 2017Date of Patent: March 26, 2019Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.Inventors: Kenji Miyanaga, Yukio Okazaki
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Publication number: 20180172814Abstract: An object detection device includes: a classifier that receives, from a radar device that transmits a transmission wave and receives a reflected wave that is the transmission wave reflected by an object around a subject vehicle, detection result information indicative of an intensity, an azimuth, and a Doppler velocity obtained from a Doppler frequency shift of the reflected wave, and determines whether the detection result information is first detection result information corresponding to a moving object or second detection result information corresponding to a still object; a calculator that calculates distances from the radar device to reflection points of the moving object on the basis of the first detection result information; and an output that supplies, to a predetermined device, first reflection point information indicating the distances of the reflection points and azimuths of the reflection points based on the radar device.Type: ApplicationFiled: December 7, 2017Publication date: June 21, 2018Inventors: YUKIO OKAZAKI, HIROFUMI NISHIMURA, ASAKO HAMADA
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Publication number: 20170346468Abstract: A radar apparatus includes a transmitter including a plurality of circuits that intermittently transmit one or more radar signals, the plurality of circuits being suspended power supplying during a period in which the one or more radar signals are not transmitted, variation detection circuitry that detects process variations of the plurality of circuits, and determination circuitry that determines a startup timing of each of the plurality of circuits in response to the process variations and outputs startup commands in response to the determined startup timings to the plurality of circuits.Type: ApplicationFiled: May 19, 2017Publication date: November 30, 2017Inventors: YUKIO OKAZAKI, KAZUTOSHI SATOU, NORIAKI SAITO
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Publication number: 20170288762Abstract: Provided is a phased array transmission device including: a plurality of transmission branches, each being provided with a phase shift unit that applies a phase rotation to a baseband signal, a DC offset correction unit that adds a first correction value to an output signal of the phase shift unit, and a mixer that subjects an output signal of the DC offset correction unit to a frequency conversion to a high frequency band; and a correction control unit that calculates a second correction value with which a carrier leak component included in an output signal of the mixer is minimized, for each of a plurality of candidates for a phase rotation amount that is set for the phase rotation, and determines the first correction value on the basis of the second correction value.Type: ApplicationFiled: March 9, 2017Publication date: October 5, 2017Inventors: KENJI MIYANAGA, YUKIO OKAZAKI
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Patent number: 9654063Abstract: A bias circuit comprises: a first circuit that comprises a first resistor and a decoupling capacitor; a bias voltage generation circuit that comprises a first transistor being connected to the first circuit; one or more switches; a first replica circuit comprising a second circuit and a second transistor, the second circuit comprising a second resistor and a capacitor, the second transistor being connected to the second circuit; a second replica circuit comprising a third transistor; a comparator that makes a comparison between a pseudo-bias voltage and a reference voltage; and a control circuit that controls the one or more switches on the basis of the comparison result to reduce the amount of the current flowing through the first transistor.Type: GrantFiled: October 16, 2015Date of Patent: May 16, 2017Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.Inventors: Yukio Okazaki, Masakatsu Maeda, Shigeki Nakamura, Akinori Daimo
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Patent number: 9614664Abstract: A wireless communication apparatus includes multiple antenna devices, a signal generator, a phase shifter, a phase controller, and a quadrature error corrector (phase error corrector and amplitude error corrector). The signal generating circuitry, in operation, generates an IQ signal having an I signal and a Q signal. The plurality of phase shifting circuitry provided for each of the plurality of antenna devices, in operation, generates a plurality of combination signals by combining the I signal and the Q signal based on a predetermined combining scheme. The phase controlling circuitry, in operation, controls the predetermined combining scheme in each of the plurality of phase shifting circuitry. The quadrature error correcting circuitry, in operation, corrects at least one of amplitude combining scheme and phase combining scheme of the predetermined combining scheme in a correction of the predetermined combining scheme.Type: GrantFiled: May 17, 2016Date of Patent: April 4, 2017Assignee: Panasonic Intellectual Property Management Co., Ltd.Inventors: Tadashi Morita, Yukio Okazaki
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Publication number: 20160352507Abstract: A wireless communication apparatus includes multiple antenna devices, a signal generator, a phase shifter, a phase controller, and a quadrature error corrector (phase error corrector and amplitude error corrector). The signal generating circuitry, in operation, generates an IQ signal having an I signal and a Q signal. The plurality of phase shifting circuitry provided for each of the plurality of antenna devices, in operation, generates a plurality of combination signals by combining the I signal and the Q signal based on a predetermined combining scheme. The phase controlling circuitry, in operation, controls the predetermined combining scheme in each of the plurality of phase shifting circuitry. The quadrature error correcting circuitry, in operation, corrects at least one of amplitude combining scheme and phase combining scheme of the predetermined combining scheme in a correction of the predetermined combining scheme.Type: ApplicationFiled: May 17, 2016Publication date: December 1, 2016Inventors: TADASHI MORITA, YUKIO OKAZAKI
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Publication number: 20160142014Abstract: A bias circuit comprises: a first circuit that comprises a first resistor and a decoupling capacitor; a bias voltage generation circuit that comprises a first transistor being connected to the first circuit; one or more switches; a first replica circuit comprising a second circuit and a second transistor, the second circuit comprising a second resistor and a capacitor, the second transistor being connected to the second circuit; a second replica circuit comprising a third transistor; a comparator that makes a comparison between a pseudo-bias voltage and a reference voltage; and a control circuit that controls the one or more switches on the basis of the comparison result to reduce the amount of the current flowing through the first transistor.Type: ApplicationFiled: October 16, 2015Publication date: May 19, 2016Inventors: YUKIO OKAZAKI, MASAKATSU MAEDA, SHIGEKI NAKAMURA, AKINORI DAIMO
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Patent number: 9294040Abstract: A power amplifier includes an output terminal, capacitive element groups including capacitive elements, and amplifier groups including amplifiers. Capacitive elements of the capacitive element groups are disposed on a first circle whose center is located on the output terminal. Amplifiers of the amplifier groups corresponding to the capacitive elements of the capacitive element groups are disposed on a second circle, which is concentric with and larger than the first circle. Each of the capacitive elements of the capacitive element groups is connected to both the output terminal and the corresponding amplifier of the amplifiers of the amplifier groups.Type: GrantFiled: November 30, 2015Date of Patent: March 22, 2016Assignee: PANASONIC CORPORATIONInventors: Yukio Okazaki, Akinori Daimo
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Publication number: 20160079928Abstract: A power amplifier includes an output terminal, capacitive element groups including capacitive elements, and amplifier groups including amplifiers. Capacitive elements of the capacitive element groups are disposed on a first circle whose center is located on the output terminal. Amplifiers of the amplifier groups corresponding to the capacitive elements of the capacitive element groups are disposed on a second circle, which is concentric with and larger than the first circle. Each of the capacitive elements of the capacitive element groups is connected to both the output terminal and the corresponding amplifier of the amplifiers of the amplifier groups.Type: ApplicationFiled: November 30, 2015Publication date: March 17, 2016Applicant: PANASONIC CORPORATIONInventors: Yukio OKAZAKI, Akinori DAIMO
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Patent number: 9231526Abstract: An SCPA includes a pad, capacitative elements, amplifiers on an IC chip. The capacitative elements are disposed on a first circle whose center is located on the pad. The amplifiers which correspond to the capacitative elements are disposed on a second circle which is a concentric circle larger than the first circle. The pad, each of the capacitative elements, and a corresponding one of the amplifiers are aligned in a line so that the length of wiring is the shortest.Type: GrantFiled: November 11, 2014Date of Patent: January 5, 2016Assignee: PANASONIC CORPORATIONInventors: Yukio Okazaki, Akinori Daimo
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Publication number: 20150180429Abstract: An SCPA includes a pad, capacitative elements, amplifiers on an IC chip. The capacitative elements are disposed on a first circle whose center is located on the pad. The amplifiers which correspond to the capacitative elements are disposed on a second circle which is a concentric circle larger than the first circle. The pad, each of the capacitative elements, and a corresponding one of the amplifiers are aligned in a line so that the length of wiring is the shortest.Type: ApplicationFiled: November 11, 2014Publication date: June 25, 2015Inventors: YUKIO OKAZAKI, AKINORI DAIMO
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Patent number: 7673145Abstract: This invention includes an image quality priority level decision processing unit (40) which evaluates the magnitude of an image quality of each of a plurality of first image data formed from biometric images associated with the same target on the basis of a specific index having the relationship of a monotone function with authentication accuracy of biometric authentication, and outputs each of the first image data upon adding a priority level thereto on the basis of the evaluation result, a first image storage (6, 81) unit which stores each of the first image data having a priority level added thereto from the image quality priority level decision processing unit (40), a second image storage unit (8, 61) which stores second image data used for comparison/collation with the first image data, an image collation unit (7) which compares/collates the second image data stored in the second image storage unit (8, 61) with the first image data stored in the first image storage unit (6, 81) and outputs the comparisonType: GrantFiled: March 5, 2004Date of Patent: March 2, 2010Assignee: Nippon Telephone and Telegraph CorporationInventors: Takahiro Hatano, Satoshi Shigematsu, Hiroki Morimura, Namiko Ikeda, Yukio Okazaki, Katsuyuki Machida, Mamoru Nakanishi
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Patent number: 7606399Abstract: A sensor cell includes a sensor electrode (101) formed on a substrate (100), a signal output unit (16) which outputs a signal corresponding to a capacitance (Cf) formed between the sensor electrode and the surface of a finger (3), a high-sensitivity electrode (103) formed on the substrate so as to be insulated and isolated from the sensor electrode, and a potential controller (14) which controls the potential of the finger surface via a capacitance (Cc) formed between the high-sensitivity electrode and the finger surface by controlling the potential of the high-sensitivity electrode. In this arrangement, when the resistance of the finger is high, the potential of the finger surface can be controlled so as not to fluctuate with the potential change of the sensor electrode.Type: GrantFiled: July 15, 2005Date of Patent: October 20, 2009Assignee: Nippon Telegraph and Telephone CorporationInventors: Hiroki Morimura, Mamoru Nakanishi, Satoshi Shigematsu, Takahiro Hatano, Yukio Okazaki, Katsuyuki Machida
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Patent number: 7589454Abstract: A driving apparatus comprises: an electro-mechanical conversion element; a driving member that drives backwards and forwards in a straight line in response to extension and contraction of the electro-mechanical conversion element which are brought about by a drive signal being supplied thereto; a driven member, frictionally engaged with the driving member, that moves backwards and forwards in a straight line along the driving member by driving the driving member; and a drive control unit that divides a whole traveling area of one or both of an outgoing traveling path and an incoming traveling path of the driven member into a plurality of divided areas and supplies different drive signals to the divided areas so as to implement a drive control.Type: GrantFiled: April 10, 2007Date of Patent: September 15, 2009Assignee: Fujinon CorporationInventors: Haruo Onozuka, Tatsuo Saito, Katsuji Ozawa, Yukio Okazaki
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Patent number: 7440534Abstract: A master latch (1) is formed from a static circuit, and a slave latch (2) is formed from a dynamic circuit. The number of circuit elements can be smaller as compared to a slave latch formed from a static circuit so that the size and area of a master-slave flip-flop can be reduced. Since the master latch is formed from a static circuit, data can be held stably during the standby time by setting the master latch in a data holding state.Type: GrantFiled: August 9, 2005Date of Patent: October 21, 2008Assignee: Nippon Telegraph and Telephone CorporationInventors: Hiroki Morimura, Satoshi Shigematsu, Yukio Okazaki, Katsuyuki Machida
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Publication number: 20080056543Abstract: A sensor cell includes a sensor electrode (101) formed on a substrate (100), a signal output unit (16) which outputs a signal corresponding to a capacitance (Cf) formed between the sensor electrode and the surface of a finger (3), a high-sensitivity electrode (103) formed on the substrate so as to be insulated and isolated from the sensor electrode, and a potential controller (14) which controls the potential of the finger surface via a capacitance (Cc) formed between the high-sensitivity electrode and the finger surface by controlling the potential of the high-sensitivity electrode. In this arrangement, when the resistance of the finger is high, the potential of the finger surface can be controlled so as not to fluctuate with the potential change of the sensor electrode.Type: ApplicationFiled: July 15, 2005Publication date: March 6, 2008Inventors: Hiroki Morimura, Mamoru Nakanishi, Satoshi Shigematsu, Takahiro Hatano, Yukio Okazaki, Katsuyuki Machida