Patents by Inventor Yukio Saka

Yukio Saka has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Self-testing circuit in semiconductor memory device
    Patent number: 7171592
    Abstract: A semiconductor memory device includes a self-testing circuit and a self-redundancy circuit with simple structures. The self-testing circuit includes a comparison circuit which compares write data with read data with respect to normal memory blocks and redundant memory blocks, and a decision circuit which decides if the semiconductor memory device is good or defective based on the plurality of comparison result signals. A signal transfer and holding circuit is connected between the comparison circuit and the decision circuit to transfer the plurality of comparison result signals to the decision circuit and to supply the plurality of comparison result signals to the self-redundancy circuit as a test result.
    Type: Grant
    Filed: February 10, 2003
    Date of Patent: January 30, 2007
    Assignee: Fujitsu Limited
    Inventors: Kenji Togashi, Morihiko Hamada, Shigekazu Aoki, Katsumi Shigenobu, Yukio Saka, Yoshikazu Arisaka, Toyoji Sawada, Tadashi Asai
  • Self-testing circuit in semiconductor memory device
    Publication number: 20030177415
    Abstract: A semiconductor memory device includes a self-testing circuit and a self-redundancy circuit with simple structures. The self-testing circuit includes a comparison circuit which compares write data with read data with respect to normal memory blocks and redundant memory blocks, and a decision circuit which decides if the semiconductor memory device is good or defective based on the plurality of comparison result signals. A signal transfer and holding circuit is connected between the comparison circuit and the decision circuit to transfer the plurality of comparison result signals to the decision circuit and to supply the plurality of comparison result signals to the self-redundancy circuit as a test result.
    Type: Application
    Filed: February 10, 2003
    Publication date: September 18, 2003
    Applicant: Fujitsu Limited
    Inventors: Kenji Togashi, Morihiko Hamada, Shigekazu Aoki, Katsumi Shigenobu, Yukio Saka, Yoshikazu Arisaka, Toyoji Sawada, Tadashi Asai