Abstract: There is provided an imaging device, comprising differential amplifier circuitry comprising a first amplification transistor and a second amplification transistor; and a plurality of pixels including a first pixel and a second pixel, wherein the first pixel includes a first photoelectric converter, a first reset transistor, and the first amplification transistor, and wherein the second pixel includes a second photoelectric converter, a second reset transistor, and the second amplification transistor, wherein the first reset transistor is coupled to a first reset voltage, and wherein the second reset transistor is coupled to a second reset voltage different than the first reset voltage.

Abstract: There is provided an imaging device including: a first semiconductor substrate having a first region that includes a photoelectric conversion section and a via portion, a second region adjacent to the first region, a connection portion disposed at the second region, and a second semiconductor substrate, wherein the connection portion electrically couples the first semiconductor substrate to the second semiconductor substrate in a stacked configuration, and wherein a width of the connection portion is greater than a width of the via portion.

Abstract: There is provided an imaging device, comprising differential amplifier circuitry comprising a first amplification transistor and a second amplification transistor; and a plurality of pixels including a first pixel and a second pixel, wherein the first pixel includes a first photoelectric converter, a first reset transistor, and the first amplification transistor, and wherein the second pixel includes a second photoelectric converter, a second reset transistor, and the second amplification transistor, wherein the first reset transistor is coupled to a first reset voltage, and wherein the second reset transistor is coupled to a second reset voltage different than the first reset voltage.

Abstract: There is provided an imaging device including: a first semiconductor substrate having a first region that includes a photoelectric conversion section and a via portion, a second region adjacent to the first region, a connection portion disposed at the second region, and a second semiconductor substrate, wherein the connection portion electrically couples the first semiconductor substrate to the second semiconductor substrate in a stacked configuration, and wherein a width of the connection portion is greater than a width of the via portion.

Abstract: There is provided an imaging device, comprising differential amplifier circuitry comprising a first amplification transistor and a second amplification transistor; and a plurality of pixels including a first pixel and a second pixel, wherein the first pixel includes a first photoelectric converter, a first reset transistor, and the first amplification transistor, and wherein the second pixel includes a second photoelectric converter, a second reset transistor, and the second amplification transistor, wherein the first reset transistor is coupled to a first reset voltage, and wherein the second reset transistor is coupled to a second reset voltage different than the first reset voltage.

Abstract: To increase a readout speed of a pixel signal in a non-differential mode in a solid-state image sensor that performs differential amplification in a differential mode and does not perform differential amplification in the non-differential mode. A connection control unit sequentially performs control of connecting a first pixel connected to a first signal line to a reset power supply via a third signal line and control of connecting a second pixel connected to a second signal line to the reset power supply via a fourth signal line in a differential mode, and performs control of connecting a third pixel to the third signal line and control of connecting the fourth pixel to the fourth signal line in a non-differential mode.

Abstract: To increase a readout speed of a pixel signal in a non-differential mode in a solid-state image sensor that performs differential amplification in a differential mode and does not perform differential amplification in the non-differential mode. A connection control unit sequentially performs control of connecting a first pixel connected to a first signal line to a reset power supply via a third signal line and control of connecting a second pixel connected to a second signal line to the reset power supply via a fourth signal line in a differential mode, and performs control of connecting a third pixel to the third signal line and control of connecting the fourth pixel to the fourth signal line in a non-differential mode.

Abstract: An imaging device is provided includes a plurality of pixels (200-1). A pixel (200-1) of the plurality of pixels includes: a first wiring coupled to a floating diffusion (221); a second wiring opposed to the first wiring such that a wiring capacitance (Cfd-vsl) is formed; a pixel amplifier (214) with a feedback capacitance that is based on the wiring capacitance; and a vertical signal line (22) arranged to output a signal from the floating diffusion. The wiring capacitance is formed between the floating diffusion and the vertical signal line.

Abstract: There is provided an imaging device, comprising differential amplifier circuitry comprising a first amplification transistor and a second amplification transistor; and a plurality of pixels including a first pixel and a second pixel, wherein the first pixel includes a first photoelectric converter, a first reset transistor, and the first amplification transistor, and wherein the second pixel includes a second photoelectric converter, a second reset transistor, and the second amplification transistor, wherein the first reset transistor is coupled to a first reset voltage, and wherein the second reset transistor is coupled to a second reset voltage different than the first reset voltage.

Abstract: There is provided an imaging device including: a first semiconductor substrate (21) having a first region (22, R11) that includes a photoelectric conversion section (67) and a via portion (51), a second region (R12) adjacent to the first region, a connection portion (53, 84, 85) disposed at the second region, and a second semiconductor substrate (81), wherein the connection portion electrically couples the first semiconductor substrate to the second semiconductor substrate in a stacked configuration, and wherein a width of the connection portion is greater than a width of the via portion.

Abstract: The present technology relates to a solid-state imaging device, an imaging apparatus, an electronic apparatus, and a semiconductor device, which can prevent overflow of an underfilling resin filled in a portion adapted to connect the substrate to the flip chip and can prevent secondary damages such as electric short-circuit and contact with processing equipment. By utilizing a molding technology of forming an on-chip lens, a dam is formed in a ring shape or a square shape in a manner surrounding a range where a flip chip is connected via a solder bump on an upper layer of a substrate of the solid-state imaging device and provided in order to form the on-chip lens. This can block the underfilling resin filled in the range where the substrate and the flip chip are electrically connected. The present technology can be applied to a solid-state imaging device.

Abstract: The present technology relates to a solid-state imaging device, an imaging apparatus, an electronic apparatus, and a semiconductor device, which can prevent overflow of an underfilling resin filled in a portion adapted to connect the substrate to the flip chip and can prevent secondary damages such as electric short-circuit and contact with processing equipment. By utilizing a molding technology of forming an on-chip lens, a dam is formed in a ring shape or a square shape in a manner surrounding a range where a flip chip is connected via a solder bump on an upper layer of a substrate of the solid-state imaging device and provided in order to form the on-chip lens. This can block the underfilling resin filled in the range where the substrate and the flip chip are electrically connected. The present technology can be applied to a solid-state imaging device.

Abstract: An image processing apparatus which previews a read image is disclosed. The image processing apparatus includes a preview image processing unit in which a user is allowed to set a processing condition for the read preview image by operating on the read preview image and a preview image processed by the processing condition is displayed together with the setting of the processing condition on a displaying section.

Abstract: An image processing apparatus which previews a read image is disclosed. The image processing apparatus includes a preview image processing unit in which a user is allowed to set a processing condition for the read preview image by operating on the read preview image and a preview image processed by the processing condition is displayed together with the setting of the processing condition on a displaying section.

Abstract: A gate electrode is formed above an n-type well including an n-type threshold voltage adjustment region, ions of p-type impurity are implanted with a low acceleration energy to form extension regions in the n-type well on both sides of the gate electrode, side wall spacers are formed on the side walls of the gate electrode, ions of p-type impurity are implanted with a small dose causing substantially no abnormal tailing in the gate electrode and with a relatively high acceleration energy to form p-type source/drain regions deeper than the threshold adjustment region, ions of atoms are implanted into the semiconductor substrate to change the upper parts of the gate electrode and the source/drain regions to amorphous state, ions of p-type impurity are implanted with a large dose to form high-concentration parts in the source/drain regions, and the impurities introduced by the ion implantation are activated.

Abstract: When a reading unit reads information of a pattern image for correcting image quality printed on at least either side of a recording medium, a control unit compares the information of the pattern image for correcting image-quality with correction pattern information that is a basis of the pattern image for correcting image quality transferred to the at least either side of the recording medium, and controls an image forming unit based on a result of the comparison to correct image quality on the at least either side of the recording medium.

Abstract: In a double-sided image forming apparatus and method, back-side images are developed on a first middle transfer belt prior to developing of front-side images on the first middle transfer belt, and the back-side images are transferred to a second middle transfer belt. The number of back-side images allowed to be supported at a time on the second middle transfer belt is determined. The number of back-side images are developed on the first middle transfer belt prior to developing of the same number of front-side images on the first middle transfer belt. The front-side image of the first middle transfer belt and the back-side image of the second middle transfer belt are simultaneously formed on both sides of a copy sheet.

Abstract: A gate electrode is formed above an n-type well including an n-type threshold voltage adjustment region, ions of p-type impurity are implanted with a low acceleration energy to form extension regions in the n-type well on both sides of the gate electrode, side wall spacers are formed on the side walls of the gate electrode, ions of p-type impurity are implanted with a small dose causing substantially no abnormal tailing in the gate electrode and with a relatively high acceleration energy to form p-type source/drain regions deeper than the threshold adjustment region, ions of atoms are implanted into the semiconductor substrate to change the upper parts of the gate electrode and the source/drain regions to amorphous state, ions of p-type impurity are implanted with a large dose to form high-concentration parts in the source/drain regions, and the impurities introduced by the ion implantation are activated.

Abstract: When a reading unit reads information of a pattern image for correcting image quality printed on at least either side of a recording medium, a control unit compares the information of the pattern image for correcting image-quality with correction pattern information that is a basis of the pattern image for correcting image quality transferred to the at least either side of the recording medium, and controls an image forming unit based on a result of the comparison to correct image quality on the at least either side of the recording medium.

Abstract: In a double-sided image forming apparatus and method, back-side images are developed on a first middle transfer belt prior to developing of front-side images on the first middle transfer belt, and the back-side images are transferred to a second middle transfer belt. The number of back-side images allowed to be supported at a time on the second middle transfer belt is determined. The number of back-side images are developed on the first middle transfer belt prior to developing of the same number of front-side images on the first middle transfer belt. The front-side image of the first middle transfer belt and the back-side image of the second middle transfer belt are simultaneously formed on both sides of a copy sheet.