Abstract: A current control element includes a control electrode, a first electrode, and a second electrode, is an element in which a current flowing from the second electrode to the first electrode is controlled by a voltage or a current between the control electrode and the first electrode, and does not include a built-in PN body diode between the first electrode and the second electrode, a rectifying element can be a Schottky barrier diode, a charge amount of the rectifying element at a time of reverse bias is smaller than an output charge amount of the current control element, an anode of the rectifying element and a cathode of the rectifying element are electrically connected to the auxiliary terminal and the second electrode, respectively, and the control electrode, the first electrode, and the second electrode are electrically connected to the control terminal, the first terminal, and the second terminal, respectively.

Abstract: An influence of a reflected image included in an infrared light image is reduced. An image pickup unit (20) includes an image pickup element (21) including an infrared light image-image pickup region (21a) and a visible light image-image pickup region (21b) and a polarizing filter (25) in which a plurality of polarizing units including a plurality of polarizing elements (25a to 25d) having principal axes different from each other are associated with a plurality of pixels forming the infrared light image-image pickup region and are arranged two-dimensionally.

Abstract: In an ion concentration sensor, both an improvement of an SN ratio of output and high responsiveness are achieved. In an ion sensor (100), a sensing unit (1) accumulates as electron injected from an n-type substrate (21) via a p-well (22) as a signal charge. The p-well (22) is laminated on the n-type substrate (21). A concentration distribution of impurities exists in the p-well (22) located between the sensing unit (1) and the n-type substrate (21), and a maximum value C1 of an impurity concentration in the p-well (22) is 0<C1?3.0×1014 cm3.

Abstract: The image processing method includes a luminance value information obtaining step of obtaining effective radiance values from a subject, and an image generating step of generating a picture image as a set of unit regions each of which has a luminance value obtained by at least partially removing a regular reflection light component on a surface of the subject from the effective radiance values.

Abstract: The image processing method includes a luminance value information obtaining step of obtaining effective radiance values from a subject, and an image generating step of generating a picture image as a set of unit regions each of which has a luminance value obtained by at least partially removing a regular reflection light component on a surface of the subject from the effective radiance values.

Abstract: The disclosure has an object to restrain properties of a filter from declining in reducing the filter in size. A periodically structured filter includes a plural types of filters. At least one of the plural types of filters is structured so as to have an optical parameter or shape that changes perpendicular to the normal to the surface of that filter with a prescribed spatial regular pattern. At least one of filters of an identical type in each unit and at least one of units adjacent to that unit is adjacent.

Abstract: A mobile information terminal includes an emitted-light polarizing filter having a transmission axis in a first direction, a received-light polarizing filter having a transmission axis in a second direction, an infrared light source emitting near infrared light through the emitted-light polarizing filter, and an image pickup section receiving reflected light generated when the near infrared light is reflected off an object, through the received-light polarizing filter. The second direction has such an angle determined with respect to the first direction that the received-light polarizing filter blocks at least part of light having a polarization property in the reflected light.

Abstract: The image processing method includes a luminance value information obtaining step of obtaining effective radiance values from a subject, and an image generating step of generating a picture image as a set of unit regions each of which has a luminance value obtained by at least partially removing a regular reflection light component on a surface of the subject from the effective radiance values.

Abstract: An ion sensor includes a sensing section that accumulates signal charges, an ion-sensitive membrane that changes the amount of signal charges which can be accumulated in the sensing section, a vertical transfer section that reads and transfers the signal charges, a reference electrode that defines a reference potential in order to determine a potential of the measurement target, and a voltage control section that changes a reference electrode voltage in association with a drive voltage for operating the ion sensor.

Abstract: A device including a memory cell including a variable resistive memory element; a capacitor; a voltage generation circuit; and a switch circuit including a first switch and a second switch. The first switch is coupled between the voltage generation circuit and the capacitor without an intervention of the second switch. The second switch is coupled between the capacitor and the memory cell without an intervention of the first switch. The first switch is configured to take an on-state during a first period of time and an off-state during a second period of time following the first period of time and the second switch is configured to take an off-state during the first period of time and an on-state during the second period of time.

Abstract: With miniaturization of a variable resistance element, it is becoming difficult to suppress the adverse effect CMP or etching might have on the resistance variable element. There is proposed a variable resistance element comprising an insulation film and a lower electrode equipped with a first portion surrounded by the insulation film and a columnar-shaped second portion protruded upwards from the first portion beyond an upper surface of the insulation film. The variable resistance element also comprises a variable resistance film that covers a preset region of the insulation film, the present region including the lower electrode, and that is electrically connected to at least an upper surface of the second portion of the lower electrode. The variable resistance element further comprises an upper electrode that covers the variable resistance film and that is electrically connected to the variable resistance film.

Abstract: A semiconductor memory device includes a memory cell array having a plurality of memory cells arranged in a matrix, each memory cell being configured such that a variable resistance element and a selection transistor are connected in series. A set operation for a memory cell (an operation of converting the resistance of the variable resistance element to a low resistance) is performed by applying a set voltage pulse for a longer time than that for a reset operation (an operation of converting the resistance of the variable resistance element to a high resistance) while limiting, using the selection transistor, an electric current flowing in the set operation to a certain low electric current, and by simultaneously applying the set voltage pulse to the plurality of memory cells.

Abstract: A variable resistive element configured to reduce a forming voltage while reducing a variation in forming voltage among elements, a method for producing it, and a highly integrated nonvolatile semiconductor memory device provided with the variable resistive element are provided. The variable resistive element includes a resistance change layer (first metal oxide film) and a control layer (second metal oxide film) having contact with a first electrode sandwiched between the first electrode and a second electrode. The control layer includes a metal oxide film having a low work function (4.5 eV or less) and capable of extracting oxygen from the resistance change layer. The first electrode includes a metal having a low work function similar to the above metal, and a material having oxide formation free energy higher than that of an element included in the control layer, to prevent oxygen from being thermally diffused from the control layer.

Abstract: The invention provides a semiconductor memory device including a variable resistance element capable of decreasing a variation of a resistance value of stored data due to a large number of times of switching operations and capable of performing a stable writing operation. The device has a circuit that applies a reforming voltage pulse to a memory cell including a variable resistance element of a degraded switching characteristic and a small read margin due to a large number of times of application of a write voltage pulse, to return each resistance state of the variable resistance element to an initial resistance state. By applying the reforming voltage pulse, the variable resistance element can recover at least one resistance state from a variation from the initial resistance state, and can recover the switching characteristic. Accordingly, there is obtained a semiconductor memory device in which a reduction of a read margin is suppressed.

Abstract: A semiconductor memory device includes a memory cell array having a plurality of memory cells arranged in a matrix, each memory cell being configured such that a variable resistance element and a selection transistor are connected in series. A set operation for a memory cell (an operation of converting the resistance of the variable resistance element to a low resistance) is performed by applying a set voltage pulse for a longer time than that for a reset operation (an operation of converting the resistance of the variable resistance element to a high resistance) while limiting, using the selection transistor, an electric current flowing in the set operation to a certain low electric current, and by simultaneously applying the set voltage pulse to the plurality of memory cells.

Abstract: Disclosed herein is a device that includes: a memory including a variable resistive memory cell including first and second terminals, a variable resistive memory element coupled between the first and second terminals, and a select transistor coupled between the second terminal and a first voltage line; and a capacitor circuit configured to be connected to the first terminal of the variable resistive memory cell when the select transistor is selected to be conductive between the second terminal and the first voltage line, the first terminal of the variable resistive memory cell being increased in voltage by the capacitor circuit to change a resistivity of the variable resistive memory element from a first level to a second level that is smaller than the first level.

Abstract: A variable resistive element configured to reduce a forming voltage while reducing a variation in forming voltage among elements, a method for producing it, and a highly integrated nonvolatile semiconductor memory device provided with the variable resistive element are provided. The variable resistive element includes a resistance change layer (first metal oxide film) and a control layer (second metal oxide film) having contact with a first electrode sandwiched between the first electrode and a second electrode. The control layer includes a metal oxide film having a low work function (4.5 eV or less) and capable of extracting oxygen from the resistance change layer. The first electrode includes a metal having a low work function similar to the above metal, and a material having oxide formation free energy higher than that of an element included in the control layer, to prevent oxygen from being thermally diffused from the control layer.

Abstract: As for a variable resistive element including first and second electrodes, and a variable resistor containing a metal oxide between the first and second electrodes, in a case where a current path having a locally high current density of a current flowing between the both electrodes is formed in the metal oxide, and resistivity of at least one specific electrode having higher resistivity of the both electrodes is 100 ??cm or more, a dimension of a contact region of the specific electrode with the variable resistor in a short side or short axis direction is set to be more than 1.4 times as long as a film thickness of the specific electrode, which reduces variation in parasitic resistance generated in an electrode part due to process variation of the electrode, and prevents variation in resistance change characteristics of the variable resistive element generated due to the variation in parasitic resistance.

Abstract: A variable resistance element that can stably perform a switching operation with a property variation being reduced by suppressing a sharp current that accompanies completion of forming process, and a non-volatile semiconductor memory device including the variable resistance element are realized. The non-volatile semiconductor memory device uses the variable resistance element for storing information in which a resistance changing layer is interposed between a first electrode and a second electrode, and a buffer layer is inserted between the first electrode and the resistance changing layer where a switching interface is formed. The buffer layer and the resistance changing layer include n-type metal oxides, and materials of the buffer layer and the resistance changing layer are selected such that energy at a bottom of a conduction band of the n-type metal oxide configuring the buffer layer is lower than that of the n-type metal oxide configuring the resistance changing layer.

Abstract: A nonvolatile semiconductor memory device for suppressing a current consumption caused by a transient current because of the potential change of the bit and word lines at the time of shifting between the programming, reading, and erasing actions in a highly integrated memory cell array is provided. A memory cell (1) array comprises two-terminal memory cells each having a variable resistance element whose resistance value reversibly changes by pulse application are arranged in a row and column directions, wherein the memory cells in a row are connected at one end to common word lines (WL1 to WLn), the memory cells in a column are connected at the other end to common bit lines (BL1 to BLm), and a common unselected voltage VWE/2 is applied to both unselected word and bit lines not connected to the selected memory cell during the reading, programming, and erasing actions for the selected memory cell.