Abstract: The invention is to provide a mute circuit capable of surely muting various noises generated in a signal output line with a simple circuit configuration and a signal output device provided with the same. A resistor and a capacitor are serially connected to each other on the signal output line of an analog signal outputted from a D/A converter, and a predetermined voltage is impressed thereon. The voltage is set to a level which is higher than a reference voltage to be supplied to the signal output line. In cases where noises are generated on the signal output line owing to variation of a voltage having an inverted polarity relative to the reference voltage, the variation is offset by the discharge of the capacitor while in cases where the noises are generated owing to the variation of a voltage having the same polarity, a resistance of the resistor is set to absorb the voltage variation.

Abstract: Buzz reduction circuit for eliminating a vertical period buzz without being influenced by amplifier circuits in an audio signal line. A video signal of a VCR video head is input to a vertical synchronizing signal separating circuit to separate a vertical synchronizing signal. A vertical synchronizing pulse is obtained by an integral circuit and a vertical period buzz reduction signal is produced by a vertical period buzz reduction circuit, said vertical period buzz reduction signal having an equal output level and an inverted phase in comparison with the vertical period buzz. The vertical period buzz reduction signal is inputted to a pre-stage of an audio amplifier circuit in an audio output line of a linear audio head to reduce the vertical period buzz included in an output signal of the linear audio head.

Abstract: It is an object of the invention to provide a channel selecting unit capable of implementing a channel selecting operation accurately in a short time with a simple circuit configuration. AFT voltages from a tuner of a picture recording and playback portion and a tuner of a receiver portion are detected by an AFT voltage detecting portion, while a synchronous signal separated at a video information processing portion of the picture recording and playback portion is counted by a pulse counter and the presence or absence of synchronization is detected by a synchronization detecting potion. A channel selecting portion transmits a tuning instruction signal to the tuner and allows tuning frequency data and an AFT voltage value, at the time when synchronization was detected, to be stored in a storage portion, thereby implementing the channel selecting operation based on stored data at the time of channel select processing of the tuner.

Abstract: It is an object of the invention to provide a video display unit which is capable of reducing power consumption without tuning off a screen itself, and capable of preventing an operator from forgetting to turn off a power supply so as to be easily operated by the operator. It is checked as to whether a music CD where no video information is stored is reproduced, and if an energy saving setting is effected in the case of the music CD, a display screen is rendered dark in a standby state by decreasing luminance of the display screen without turning off the display screen. Further, if a key input is effected for a predetermined time interval, the display screen is not rendered in the standby state, while if the key input is effected even in the case of setting to the standby state, the display screen is returned to the normal state. Still further, if the reproduction of the CD is ended in the standby state, the power supply is automatically rendered in an OFF state.

Abstract: This invention provides a television receiver capable of receiving a desired channel by a simple operation when a channel number key is operated to select a to-be-received channel of a one-digit channel number. The television receiver includes a remote controller that includes channel number keys for selecting a to-be-received channel, a television monitor that outputs a broadcast content of the received channel, and a control micro computer. The television receiver is constituted so that channels, broadcasts on which are received, are sequentially stored, and the channel having the largest number of times of receiving and the last channel received just before the television receiver is turned off are stored. The television receiver determines whether one of or both of a first condition that the channel having the largest number of times of receiving is a one-digit channel and a second condition that the last channel is a one-digit channel are satisfied.

Abstract: This invention provides a television receiver capable of performing stable channel receiving when a channel number key is operated to select a to-be-received channel. If the channel number key provided on a remote controller for operating the television receiver is depressed for predetermined time that is equal to or longer than tuning time that is time from starting the operation of the channel number key until finishing the reception of a channel corresponding to the key, then receiving of the channel corresponding to the operated channel number key is confirmed, and a broadcast content of the confirmed channel is output to a television monitor.

Abstract: It is an object of the present invention to provide an integrated circuit for signal input switching which can record a video or the like on a recording unit and can output the video or the like to a monitor unit, and can reduce a cross talk. An integrated circuit (20) for signal input switching is constituted as follows. The integrated circuit (20) comprises a recording input switching section (2), a monitor input switching section (3), and wirings for leading signals output from signal sources (21), (22), (31) and (32) to the recording input switching section (2) and the monitor input switching section (3). The recording input switching section (2) switches a connection of the signal sources (21), (22), (31) and (32) and a recording unit (26). The monitor input switching section (3) switches a connection of the signal sources (21), (22), (31) and (32) and a monitor unit (27).

Abstract: A signal mixing circuit for mixing synchronizing signals and video signals without attenuating these signals, comprising a first semiconductor device for inputting and outputting synchronizing signals and a second semiconductor device for inputting and outputting video signals, wherein said first and second semiconductor devices operate as a buffer amplifier of input signals and said synchronizing signals and video signals are mixed after passing said first and second semiconductor devices respectively.

Abstract: Buzz reduction circuit for eliminating a vertical period buzz without being influenced by amplifier circuits in an audio signal line. A video signal of a VCR video head is input to a vertical synchronizing signal separating circuit to separate a vertical synchronizing signal. A vertical synchronizing pulse is obtained by an integral circuit and a vertical period buzz reduction signal is produced by a vertical period buzz reduction circuit, said vertical period buzz reduction signal having an equal output level and an inverted phase in comparison with the vertical period buzz. The vertical period buzz reduction signal is inputted to a pre-stage of an audio amplifier circuit in an audio output line of a linear audio head to reduce the vertical period buzz included in an output signal of the linear audio head.