Patents by Inventor Yukio Yano
Yukio Yano has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 6462587Abstract: An integrated circuit including a comparator circuit and a vertical voltage control switch element formed on a single substrate. The comparator circuit including a differential amplifier circuit having a current mirror circuit M, a differential amplifier circuit D1 with two current paths L1 and L2, and an inverter INV. The output section of the current mirror circuit M is used as a constant current source for the differential amplifier circuit. The current mirror circuit M includes a load MOS transistor 1, a MOS transistor 2 constituting an input section, and a MOS transistor 10 constituting an output section. The current path L1 of the differential amplifier circuit D1 includes a load MOS transistor 11, an amplifying depletion type MOS transistor 13, and an input terminal in1. Similarly, the current path L2 includes a load MOS transistor 12, an amplifying depletion type MOS transistor 14, and an input terminal in2. The inverter INV is constructed with a load MOS transistor 3 and a switching transistor 4.Type: GrantFiled: April 3, 2001Date of Patent: October 8, 2002Assignee: Fuji Electric Co., Ltd.Inventor: Yukio Yano
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Patent number: 6323539Abstract: A high voltage integrated circuit is provided that includes a first region of first conductivity type; a second region of second conductivity type formed in a first major surface of the first region; a third region of first conductivity type formed in a selected area of a surface of the second region; first source region and first drain region of the first conductivity type formed in the second region, apart from the third region; a first gate electrode formed on a surface of the second region between the first source region and first drain region, through an insulating film; second source region and second drain region of second conductivity type formed in a surface of the third region; and a second gate electrode formed on a surface of the third region between the second source region and the second drain region, through an insulating film.Type: GrantFiled: August 16, 2000Date of Patent: November 27, 2001Assignee: Fuji Electric Co., Ltd.Inventors: Tatsuhiko Fujihira, Yukio Yano, Shigeyuki Obinata, Naoki Kumagai
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Patent number: 6320429Abstract: An integrated circuit including a comparator circuit and a vertical voltage control switch element formed on a single substrate. The comparator circuit including a differential amplifier circuit having a current mirror circuit M, a differential amplifier circuit D1 with two current paths L1 and L2, and an inverter INV. The output section of the current mirror circuit M is used as a constant current source for the differential amplifier circuit. The current mirror circuit M includes a load MOS transistor 1, a MOS transistor 2 constituting an input section, and a MOS transistor 10 constituting an output section. The current path L1 of the differential amplifier circuit D1 includes a load MOS transistor 11, an amplifying depletion type MOS transistor 13, and an input terminal in1. Similarly, the current path L2 includes a load MOS transistor 12, an amplifying depletion type MOS transistor 14, and an input terminal in2. The inverter INV is constructed with a load MOS transistor 3 and a switching transistor 4.Type: GrantFiled: September 19, 1994Date of Patent: November 20, 2001Assignee: Fuji Electric Co., Ltd.Inventor: Yukio Yano
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Publication number: 20010010479Abstract: An integrated circuit including a comparator circuit and a vertical voltage control switch element formed on a single substrate. The comparator circuit including a differential amplifier circuit having a current mirror circuit M, a differential amplifier circuit D1 with two current paths L1 and L2, and an inverter INV. The output section of the current mirror circuit M is used as a constant current source for the differential amplifier circuit. The current mirror circuit M includes a load MOS transistor 1, a MOS transistor 2 constituting an input section, and a MOS transistor 10 constituting an output section. The current path L1 of the differential amplifier circuit D1 includes a load MOS transistor 11, an amplifying depletion type MOS transistor 13, and an input terminal in1. Similarly, the current path L2 includes a load MOS transistor 12, an amplifying depletion type MOS transistor 14, and an input terminal in2. The inverter INV is constructed with a load MOS transistor 3 and a switching transistor 4.Type: ApplicationFiled: April 3, 2001Publication date: August 2, 2001Applicant: Fuji Electric Co., Ltd.Inventor: Yukio Yano
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Patent number: 6124628Abstract: A high voltage integrated circuit is provided that includes a first region of first conductivity type; a second region of second conductivity type formed in a first major surface of the first region; a third region of first conductivity type formed in a selected area of a surface of the second region; first source region and first drain region of the first conductivity type formed in the second region, apart from the third region; a first gate electrode formed on a surface of the second region between the first source region and first drain region, through an insulating film; second source region and second drain region of second conductivity type formed in a surface of the third region; and a second gate electrode formed on a surface of the third region between the second source region and the second drain region, through an insulating film.Type: GrantFiled: April 12, 1996Date of Patent: September 26, 2000Assignee: Fuji Electric Co., Ltd.Inventors: Tatsuhiko Fujihira, Yukio Yano, Shigeyuki Obinata, Naoki Kumagai
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Patent number: 5811996Abstract: A gate drive circuit device for a voltage-driven semiconductor element reduces the time to dissipate inductively stored electromagnetic energy and reduces current consumption by using cyclically charged capacitative storage to produce a control signal that is about twice the supply voltage. This permits full-ON dissipation of the stored energy after the circuit cuts off power to the inductive element. In one embodiment, the dissipation is chiefly in a voltage-regulator diode connected to limit the voltage appearing across a transistor. In another embodiment, a voltage regulator diode permits a transistor to operate in the full-on condition, while limiting the voltage across it to a value below its withstand voltage, whereby a maximum power dissipation current flows in the transistor. In a further embodiment a gate drive signal generator eliminates a voltage regulator diode from the conventional gate drive circuit device.Type: GrantFiled: December 17, 1996Date of Patent: September 22, 1998Assignee: Fuji Electric Co., Ltd.Inventors: Kazunori Oyabe, Tatsuhiko Fujihira, Kazuhiko Yoshida, Yukio Yano
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Patent number: 5621601Abstract: The disclosed invention is designed to prevent the oscillation which often occurs in an over-current protection apparatus for an insulated gate controlled transistor. The apparatus improves the response in current detection, to prevent oscillation, and improves protection speed against over-current.Type: GrantFiled: September 28, 1994Date of Patent: April 15, 1997Assignee: Fuji Electric Co., Ltd.Inventors: Tatsuhiko Fujihira, Shin Kiuchi, Kazuhiko Yoshida, Yukio Yano, Kazunori Oyabe, Shoichi Furuhata, Tetsuhiro Morimoto
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Patent number: 5530277Abstract: An insulated-gate bipolar transistor is formed of a number of cells integrally formed on a semiconductor substrate. The cells includes main cells with emitter electrodes, and current detection sensing cells situated adjacent to the main cells. Emitter electrodes are formed in an area of the sensing cells to be separated from the emitter electrodes of the main cells, and an overcurrent protection circuit is connected to the emitter electrodes of the sensing cells. When shorting accident occurs, an overcurrent protecting operation is performed such that an overcurrent is accurately detected through the sensing cells and a main current flowing through the main cells is made smaller than a short-circuit withstanding capacity of the IGBT by gate control of the protection circuit.Type: GrantFiled: October 12, 1994Date of Patent: June 25, 1996Assignee: Fuji Electric Co., Ltd.Inventors: Masahito Otsuki, Shigeyuki Obinata, Yukio Yano
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Patent number: 5461259Abstract: Collective transistors in a high-current IC are arranged in the column and row directions on a substrate, with each row having two collective transistors. The collective transistors are connected in a multi-phase half bridge circuit by wiring conductors which extend in the row direction and by a pair of wiring conductors which extend in the column direction. Each wiring conductor in the row direction includes a top conductive layer which is positioned over a first one of the collective transistors in the respective row and a bottom conductive layer which is positioned over the second collective transistor in the respective row, the top and bottom conductive layers being connected to one another through a connecting hole in an interlayer insulation film.Type: GrantFiled: February 25, 1993Date of Patent: October 24, 1995Assignee: Fuji Electric Co., Ltd.Inventors: Akio Kitamura, Yukio Yano