Patents by Inventor Yukisato Miyazaki
Yukisato Miyazaki has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 10356859Abstract: A phase controller includes a plurality of pulse width modulation (PWM) circuits, a plurality of switching devices, a computing unit, and a latency generator. The plurality of PWM circuits output pulse signals. The plurality of switching devices are coupled to the respective plurality of PWM circuits, and switch on and off based on the pulse signals. The computing unit calculates the pulse signals to be output from the plurality of PWM circuits, based on outputs of the plurality of switching devices. The latency generator generates latency in any of the pulse signals so that edge positions of the pulse signals output from the plurality of PWM circuits do not collide with each other, wherein the pulse signals change values at the edge positions.Type: GrantFiled: January 4, 2018Date of Patent: July 16, 2019Assignee: Cypress Semiconductor CorporationInventors: Takuya Kurishita, Yukisato Miyazaki
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Publication number: 20180168012Abstract: A phase controller includes a plurality of pulse width modulation (PWM) circuits, a plurality of switching devices, a computing unit, and a latency generator. The plurality of PWM circuits output pulse signals. The plurality of switching devices are coupled to the respective plurality of PWM circuits, and switch on and off based on the pulse signals. The computing unit calculates the pulse signals to be output from the plurality of PWM circuits, based on outputs of the plurality of switching devices. The latency generator generates latency in any of the pulse signals so that edge positions of the pulse signals output from the plurality of PWM circuits do not collide with each other, wherein the pulse signals change values at the edge positions.Type: ApplicationFiled: January 4, 2018Publication date: June 14, 2018Applicant: Cypress Semiconductor CorporationInventors: Takuya Kurishita, Yukisato MIYAZAKI
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Patent number: 9872346Abstract: A phase controller includes a plurality of pulse width modulation (PWM) circuits, a plurality of switching devices, a computing unit, and a latency generator. The plurality of PWM circuits output pulse signals. The plurality of switching devices are coupled to the respective plurality of PWM circuits, and switch on and off based on the pulse signals. The computing unit calculates the pulse signals to be output from the plurality of PWM circuits, based on outputs of the plurality of switching devices. The latency generator generates latency in any of the pulse signals so that edge positions of the pulse signals output from the plurality of PWM circuits do not collide with each other, wherein the pulse signals change values at the edge positions.Type: GrantFiled: September 25, 2015Date of Patent: January 16, 2018Assignee: Cypress Semiconductor CorporationInventors: Takuya Kurishita, Yukisato Miyazaki
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Publication number: 20160338157Abstract: A phase controller includes a plurality of pulse width modulation (PWM) circuits, a plurality of switching devices, a computing unit, and a latency generator. The plurality of PWM circuits output pulse signals. The plurality of switching devices are coupled to the respective plurality of PWM circuits, and switch on and off based on the pulse signals. The computing unit calculates the pulse signals to be output from the plurality of PWM circuits, based on outputs of the plurality of switching devices. The latency generator generates latency in any of the pulse signals so that edge positions of the pulse signals output from the plurality of PWM circuits do not collide with each other, wherein the pulse signals change values at the edge positions.Type: ApplicationFiled: September 25, 2015Publication date: November 17, 2016Inventors: Takuya Kurishita, Yukisato MIYAZAKI
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Patent number: 7276944Abstract: A clock generation circuit and a clock generation method are provided, which are spread spectrum clock generation and accurate phase control of a reference clock signal and an output clock signal. An input divider unit 70 divides an input clock signal CLKR by 50 to output a divided input clock signal CLKS. A DLL circuit 80 operates to obtain delay control signals DCS1, DCS2. A modulation circuit 40 modulates, in response to the delay control signals DCS1, DCS2 and a modulation signal MOD output from a modulation control circuit 50, the divided input clock signal CLKS to output a modulation clock signal CLKN. A phase comparator 11 detects the phase difference between the modulation clock signal CLKN and a divided inner clock signal CLKM. A clock generation unit 20 generates an output clock signal CLKO having frequency corresponding to a phase difference signal from the phase comparator 11.Type: GrantFiled: December 21, 2005Date of Patent: October 2, 2007Assignee: Fujitsu LimitedInventor: Yukisato Miyazaki
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Publication number: 20070057709Abstract: A clock generation circuit and a clock generation method are provided, which are capable of spread spectrum clock generation and accurate phase control of a reference clock signal and an output clock signal. To this end, an input divider unit 70 divides an input clock signal CLKR by 50 to output a divided input clock signal CLKS. A DLL circuit 80 operates to obtain delay control signals DCS1, DCS2. A modulation circuit 40 modulates, in response to the delay control signals DCS1, DCS2 and a modulation signal MOD output from a modulation control circuit 50, the divided input clock signal CLKS to output a modulation clock signal CLKN. A phase comparator 11 detects the phase difference between the modulation clock signal CLKN and a divided inner clock signal CLKM. A clock generation unit 20 generates an output clock signal CLKO having frequency corresponding to a phase difference signal from the phase comparator 11.Type: ApplicationFiled: December 21, 2005Publication date: March 15, 2007Inventor: Yukisato Miyazaki
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Publication number: 20060244499Abstract: A spread spectrum clock generation circuit capable of further reducing the electromagnetic wave radiation with a simple configuration has been disclosed and, particularly in a spread spectrum clock generation circuit using a current control oscillator (ICO), a differential signal to which a spread spectrum modulation signal, the period or amplitude of which changes, is added is generated, and the differential signal is applied to the ICO and a clock is generated.Type: ApplicationFiled: June 28, 2006Publication date: November 2, 2006Inventors: Shinji Miyata, Kouji Okada, Masao Iijima, Yukisato Miyazaki
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Patent number: 7095260Abstract: A spread spectrum clock generation circuit capable of further reducing the electromagnetic wave radiation with a simple configuration has been disclosed and, particularly in a spread spectrum clock generation circuit using a current control oscillator (ICO), a differential signal to which a spread spectrum modulation signal, the period or amplitude of which changes, is added is generated, and the differential signal is applied to the ICO and a clock is generated.Type: GrantFiled: September 2, 2005Date of Patent: August 22, 2006Assignee: Fujitsu LimitedInventors: Shinji Miyata, Kouji Okada, Masao Iijima, Teruhiko Saitou, Yukisato Miyazaki
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Publication number: 20050285641Abstract: A spread spectrum clock generation circuit capable of further reducing the electromagnetic wave radiation with a simple configuration has been disclosed and, particularly in a spread spectrum clock generation circuit using a current control oscillator (ICO), a differential signal to which a spread spectrum modulation signal, the period or amplitude of which changes, is added is generated, and the differential signal is applied to the ICO and a clock is generated.Type: ApplicationFiled: September 2, 2005Publication date: December 29, 2005Inventors: Shinji Miyata, Kouji Okada, Masao Iijima, Teruhiko Saitou, Yukisato Miyazaki
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Patent number: 6975148Abstract: A spread spectrum clock generation circuit capable of further reducing the electromagnetic wave radiation with a simple configuration has been disclosed and, particularly in a spread spectrum clock generation circuit using a current control oscillator (ICO), a differential signal to which a spread spectrum modulation signal, the period or amplitude of which changes, is added is generated, and the differential signal is applied to the ICO and a clock is generated.Type: GrantFiled: December 23, 2003Date of Patent: December 13, 2005Assignee: Fujitsu LimitedInventors: Shinji Miyata, Kouji Okada, Masao Iijima, Teruhiko Saitou, Yukisato Miyazaki
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Patent number: 6895496Abstract: A microcontroller, connected to a memory which stores instructions and data, includes an instruction execution unit for reading instructions and data from the memory and processing the read instructions and a prefetch circuit unit that receives the instructions and data read from the memory and detects pseudo instructions included in the instructions and data. A pseudo instruction precedes a branch instruction and indicates the existence of the branch instruction and the branch to address. The prefetch circuit unit includes a prefetch buffer connected between the instruction execution unit and the memory for temporarily storing instructions and data being transferred from the memory to the instruction execution unit and a pseudo instruction buffer for temporarily storing instructions and data located at the address of the branch instruction which follows the pseudo instruction.Type: GrantFiled: March 12, 1999Date of Patent: May 17, 2005Assignee: Fujitsu LimitedInventors: Kazuya Taniguchi, Yukisato Miyazaki
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Publication number: 20040136440Abstract: A spread spectrum clock generation circuit capable of further reducing the electromagnetic wave radiation with a simple configuration has been disclosed and, particularly in a spread spectrum clock generation circuit using a current control oscillator (ICO), a differential signal to which a spread spectrum modulation signal, the period or amplitude of which changes, is added is generated, and the differential signal is applied to the ICO and a clock is generated.Type: ApplicationFiled: December 23, 2003Publication date: July 15, 2004Applicant: FUJITSU LIMITEDInventors: Shinji Miyata, Kouji Okada, Masao Iijima, Teruhiko Saitou, Yukisato Miyazaki
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Patent number: 6502179Abstract: A processor for performing calculations based on an instruction code, the number of bits of which is not an integer multiple of a byte. The instruction code is divided into higher order bits and lower order bits. The number of the lower order bits is an integer multiple of one byte. A memory stores the lower order bits in a lower order bit storage section and the higher order bits in a higher order bit storage section. The lower order bits and the corresponding higher order bits are read from the memory in the same cycle when generating the instruction code.Type: GrantFiled: January 25, 2001Date of Patent: December 31, 2002Assignee: Fujitsu LimitedInventors: Teruyoshi Kondo, Masayuki Takeshige, Sumitaka Hibino, Hayato Isobe, Yukisato Miyazaki, Kunihiro Ohara, Kazuya Taniguchi, Hiroshi Naritomi
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Publication number: 20020023205Abstract: A processor for performing calculations based on an instruction code, the number of bits of which is not an integer multiple of a byte. The instruction code is divided into higher order bits and lower order bits. The number of the lower order bits is an integer multiple of one byte. A memory stores the lower order bits in a lower order bit storage section and the higher order bits in a higher order bit storage section. The lower order bits and the corresponding higher order bits are read from the memory in the same cycle when generating the instruction code.Type: ApplicationFiled: January 25, 2001Publication date: February 21, 2002Inventors: Teruyoshi Kondo, Masayuki Takeshige, Sumitaka Hibino, Hayato Isobe, Yukisato Miyazaki, Kunihiro Ohara, Kazuya Taniguchi, Hiroshi Naritomi