Patents by Inventor Yukitaka Hori

Yukitaka Hori has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11495667
    Abstract: A semiconductor device includes a semiconductor substrate, a first anode electrode, and a second anode electrode. The first anode electrode is disposed on the semiconductor substrate. The second anode electrode is spaced from the first anode electrode on the semiconductor substrate around the first anode electrode. At least any of a first end of the first anode electrode on a second anode electrode side and a second end of the second anode electrode on a first anode electrode side is covered with a SInSiN film.
    Type: Grant
    Filed: December 29, 2020
    Date of Patent: November 8, 2022
    Assignee: Mitsubishi Electric Corporation
    Inventor: Yukitaka Hori
  • Publication number: 20210249514
    Abstract: A semiconductor device includes a semiconductor substrate, a first anode electrode, and a second anode electrode. The first anode electrode is disposed on the semiconductor substrate. The second anode electrode is spaced from the first anode electrode on the semiconductor substrate around the first anode electrode. At least any of a first end of the first anode electrode on a second anode electrode side and a second end of the second anode electrode on a first anode electrode side is covered with a SInSiN film.
    Type: Application
    Filed: December 29, 2020
    Publication date: August 12, 2021
    Applicant: Mitsubishi Electric Corporation
    Inventor: Yukitaka HORI
  • Publication number: 20170062412
    Abstract: A transistor element includes: a first semiconductor substrate on which a first transistor cell region is formed; a first gate electrode pad formed on the first semiconductor substrate and connected to a gate in the first transistor cell region; a relay electrode pad formed on the first semiconductor substrate; and a gate resistance formed on the first semiconductor substrate and connected between the first gate electrode pad and the relay electrode pad.
    Type: Application
    Filed: April 19, 2016
    Publication date: March 2, 2017
    Applicant: Mitsubishi Electric Corporation
    Inventors: Makoto KAWANO, Kazutoyo TAKANO, Yukitaka HORI
  • Patent number: 7867829
    Abstract: There is provided a semiconductor device manufacturing method which prevents cracking of an overcoat during polishing process, and a semiconductor wafer and a semiconductor device which have an overcoat free from cracking. A plurality of divided overcoats 10 are formed on each chip 3 in a chip region 2 and on each unavailable chip pattern in an unavailable region in the periphery of the chips 3 on the surface of a semiconductor wafer 1, and the semiconductor wafer 1 is mounted upside down on a table with an intervening film so that the back surface of the semiconductor wafer 1 is polished.
    Type: Grant
    Filed: December 29, 2006
    Date of Patent: January 11, 2011
    Assignee: Mitsubishi Electric Corporation
    Inventor: Yukitaka Hori
  • Publication number: 20080070347
    Abstract: There is provided a semiconductor device manufacturing method which prevents cracking of an overcoat during polishing process, and a semiconductor wafer and a semiconductor device which have an overcoat free from cracking. A plurality of divided overcoats 10 are formed on each chip 3 in a chip region 2 and on each unavailable chip pattern in an unavailable region in the periphery of the chips 3 on the surface of a semiconductor wafer 1, and the semiconductor wafer 1 is mounted upside down on a table with an intervening film so that the back surface of the semiconductor wafer 1 is polished.
    Type: Application
    Filed: December 29, 2006
    Publication date: March 20, 2008
    Applicant: MITSUBISHI ELECTRIC CORPORATION
    Inventor: Yukitaka HORI
  • Patent number: 7012332
    Abstract: A semiconductor chip and connection ends of corresponding external electrode terminals are encapsulated with a glass based sealing material, and the semiconductor chip includes a wide gap semiconductor element, and the electrodes of the semiconductor chip are connected to the end portions of the external electrode terminals by a silver based brazing member and/or pressure contact.
    Type: Grant
    Filed: September 25, 2003
    Date of Patent: March 14, 2006
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Yukitaka Hori, Katsumi Satoh, Norihisa Asano
  • Publication number: 20040070059
    Abstract: A semiconductor chip and connection ends of corresponding external electrode terminals are encapsulated with a glass based sealing material, and the semiconductor chip includes a wide gap semiconductor element, and the electrodes of the semiconductor chip are connected to the end portions of the external electrode terminals by a silver based brazing member and/or pressure contact.
    Type: Application
    Filed: September 25, 2003
    Publication date: April 15, 2004
    Applicant: MITSUBISHI DENKI KABUSHIKI KAISHA
    Inventors: Yukitaka Hori, Katsumi Satoh, Norihisa Asano