Patents by Inventor Yukitoshi Sanada

Yukitoshi Sanada has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20040233841
    Abstract: An Orthogonal Frequency Division Multiplexing (OFDM) receiving apparatus having a sub-carrier selectively combining mode and an antenna selecting mode. The sub-carrier selectively combining mode is configured to selectively combine signals for each sub-carrier. The antenna selecting mode is configured to select a receiving antenna. The OFDM receiving apparatus operates in a proper operation mode based on a communication environment. As a result, in a poor communication environment, signals are selectively combined for each sub-carrier. However, in a relatively satisfactory communication environment, unnecessarily operation of an RF and IF circuit, an A/D converter, and a DDT connected to each receiving antenna may be avoided.
    Type: Application
    Filed: February 24, 2004
    Publication date: November 25, 2004
    Applicant: SONY CORPORATION
    Inventors: Yukitoshi Sanada, Masayoshi Abe
  • Patent number: 6823181
    Abstract: The universal platform for the SDR of the present invention employs the direct conversion approach with the n-port MMIC followed by reconfigurable reprogrammable devices such as DSP's or FPGA's. The universal platform is based on the linear operation of the devices. Thus, the DC offset problem may be solved. It is also possible to support very wide bandwidths compared with conventional I/Q receivers. Therefore, the present universal platform is suitable for multimode and multiband communications.
    Type: Grant
    Filed: July 23, 2002
    Date of Patent: November 23, 2004
    Assignees: Sony Corporation, Sony International (Europe) GmbH
    Inventors: Ryuji Kohno, Masayoshi Abe, Noboru Sasho, Shinichiro Haruyama, Robert Henry Morelos-Zaragoza, Francis Swarts, Pieter Van Rooyen, Yukitoshi Sanada, Lachlan Bruce Michael, Hamid Amir-Alikhani, Veselin Brankovic
  • Publication number: 20040174925
    Abstract: [Object] The present invention provides a UWB transmitter and receiver, the transmission rate of which is increased, and the SN ratio of which is improved.
    Type: Application
    Filed: August 19, 2003
    Publication date: September 9, 2004
    Inventor: Yukitoshi Sanada
  • Patent number: 6778147
    Abstract: To realize an antenna apparatus capable of measuring a calibration factor accurately and further, capable of estimating an arrival direction of a received signal by composing a calibration circuit by using a directional coupler. The antenna system includes L-number of branch units, a calibration circuit and an operating unit. Each directional coupler composing the calibration circuit is structured symmetrically. Measuring the received signals Yti, i−1 and Yti, i+1 of i−1th and i+1th receivers, respectively, when an ith transmitter transmits a signal, on the basis of the first branch unit, the operating unit calculates a calibration factor at the ith branch unit as Hi=T1Ri/(TiR1)=Yt12Yt23−Yti−1,i/Yt21Yt32−Yti,i−1.
    Type: Grant
    Filed: January 23, 2003
    Date of Patent: August 17, 2004
    Assignee: Sony Corporation
    Inventors: Yukitoshi Sanada, Ryuji Kohno
  • Patent number: 6768337
    Abstract: A plurality of circuit cells, a plurality of matrix switch sections and a plurality of switch sections for connecting between the plurality of circuit cells, all of which form a part of a circuit cell array, and a plurality of input/output cell sections arranged around the circuit cell array all change their circuit configurations in accordance with a configuration data to be supplied. In some of these circuit blocks, at least a part of the circuit thereof is fixed at a predetermined circuit configuration, and a conversion of the configuration data based on proprietary information regarding the fixed circuit is performed at a supplier of the configuration data. Thus, a differential configuration data for portions of the circuit other than the fixed circuit portion is generated and supplied to the integrated circuit.
    Type: Grant
    Filed: August 19, 2002
    Date of Patent: July 27, 2004
    Assignee: Sony Corporation
    Inventors: Ryuji Kohno, Kenichiro Akai, Yukitoshi Sanada, Robert Morelos-Zaragoza, Lachlan Michael
  • Patent number: 6714602
    Abstract: A high performance demodulator, capable of realizing further broadband characteristics, low distortion, a low power consumption, and small fluctuation in characteristics against fluctuations in temperature and fluctuations over time compared with a conventional multi-port demodulators, wherein a two-terminal first phase shifter 1004, three-terminal second branch circuit 1002, two-terminal second phase shifter 1005, and three-terminal third branch circuit 1003 are connected in series between a first signal input terminal TINSr for a reception signal and a second signal input terminal TINSlo for a local signal, a third terminal c of a first branch circuit 1001 is connected to a first power detection circuit 1006, a third terminal c of the second branch circuit 1002 is connected to a second power detection circuit 1007, and a third terminal c of the third branch circuit 1003 is connected to a third power detection circuit 1008, and comprising an N-port signal-IQ signal conversion circuit 1009 for receiving outpu
    Type: Grant
    Filed: October 4, 2002
    Date of Patent: March 30, 2004
    Assignees: Sony Corporation, Sony International (Europe) G.m.b.H.
    Inventors: Abe Masayoshi, Yukitoshi Sanada, Dragan Krupezvic, Veselin Brankovic
  • Publication number: 20030227408
    Abstract: To realize an antenna apparatus capable of measuring a calibration factor accurately and further, capable of estimating an arrival direction of a received signal by composing a calibration circuit by using a directional coupler. The antenna system includes L-number of branch units, a calibration circuit and an operating unit. Each directional coupler composing the calibration circuit is structured symmetrically. Measuring the received signals Yti, i−1 and Yti, i+1 of i−1th and i+1th receivers, respectively, when an ith transmitter transmits a signal, on the basis of the first branch unit, the operating unit calculates a calibration factor at the ith branch unit as Hi=T1Ri/(TiR1)=Yt12Yt23−Yti−1,i/Yt21Yt32−Yti,i−1.
    Type: Application
    Filed: January 23, 2003
    Publication date: December 11, 2003
    Applicant: Sony Corporation
    Inventors: Yukitoshi Sanada, Ryuji Kohno
  • Patent number: 6573864
    Abstract: A receiver is provided which can avoid demodulation performance from deteriorating due to changes in circuit constants caused by changes over time and temperature-dependent changes, prevent an increase in the receiver size, and realize a cost reduction. A switch control section is provided to perform control such that an input terminal of one of a plurality of phase varying circuits is selectively connected through a first switch circuit to any of an output terminal of an RF amplifier and a local signal output terminal of a local signal generating circuit, whereby the one phase varying circuit serves as a calibration circuit in the calibration processing that is executed in the non-reception mode. Also, the output terminal of the one phase varying circuit is selectively connected through a second switch circuit or a third switch circuit to any of one input terminal of a signal combiner and a first input terminal of a multi-port junction circuit in a multi-port direct conversion demodulating section.
    Type: Grant
    Filed: October 23, 2001
    Date of Patent: June 3, 2003
    Assignee: Sony Corporation
    Inventors: Yukitoshi Sanada, Masayoshi Abe, Ryuji Kohno
  • Publication number: 20030080776
    Abstract: A plurality of circuit cells, a plurality of matrix switch sections and a plurality of switch sections for connecting between the plurality of circuit cells, all of which form a part of a circuit cell array, and a plurality of input/output cell sections arranged around the circuit cell array all change their circuit configurations in accordance with a configuration data to be supplied. In some of these circuit blocks, at least a part of the circuit thereof is fixed at a predetermined circuit configuration, and a conversion of the configuration data based on proprietary information regarding the fixed circuit is performed at a supplier of the configuration data. Thus, a differential configuration data for portions of the circuit other than the fixed circuit portion is generated and supplied to the integrated circuit.
    Type: Application
    Filed: August 19, 2002
    Publication date: May 1, 2003
    Inventors: Ryuji Kohno, Kenichiro Akai, Yukitoshi Sanada, Robert Morelos-Zaragoza, Lachlan Michael
  • Publication number: 20030054790
    Abstract: A receiver includes a phased array antenna and a demodulator. The phased array antenna includes first and second antenna elements and a phase shifter for shifting the phase of a signal received by the first antenna element by a predetermined amount. The demodulator includes a first junction circuit which receives a local signal and a signal output from the phase shifter and which generates a plurality of signals having a phase difference; a second junction circuit which receives a local signal and a signal output from the second antenna element and which generates a plurality of signals having a phase difference; signal combiners for combining corresponding signals output from the two junction circuits; power detectors for detecting the signal levels of the output signals of the signal combiners; and a converter for converting the outputs signals of the power detectors so as to obtain IQ signals.
    Type: Application
    Filed: October 23, 2001
    Publication date: March 20, 2003
    Inventors: Yukitoshi Sanada, Masayoshi Abe, Ryuji Kohno
  • Publication number: 20020140601
    Abstract: A receiver is provided which can avoid demodulation performance from deteriorating due to changes in circuit constants caused by changes over time and temperature-dependent changes, prevent an increase in the receiver size, and realize a cost reduction. A switch control section is provided to perform control such that an input terminal of one of a plurality of phase varying circuits is selectively connected through a first switch circuit to any of an output terminal of an RF amplifier and a local signal output terminal of a local signal generating circuit, whereby the one phase varying circuit serves as a calibration circuit in the calibration processing that is executed in the non-reception mode. Also, the output terminal of the one phase varying circuit is selectively connected through a second switch circuit or a third switch circuit to any of one input terminal of a signal combiner and a first input terminal of a multi-port junction circuit in a multi-port direct conversion demodulating section.
    Type: Application
    Filed: October 23, 2001
    Publication date: October 3, 2002
    Inventors: Yukitoshi Sanada, Masayoshi Abe, Ryuji Kohno