Abstract: An AD converter includes: AD conversion stages configured to generate digital data having a value corresponding to a relationship between two analog signals being input and amplifying two analog residual signals with a first amplifier and a second amplifier with gain to be controlled to output the signals; and a gain control part configured to control gain of the first amplifier and the second amplifier on the basis of a monitoring result of the output signals of the first amplifier and the second amplifier. The first amplifier and the second amplifier are formed of open-loop amplifiers, and the gain control part takes out amplitude information of the output signals of the first amplifier and the second amplifier in at least one of the AD conversion stages and performs gain control so that amplitude of the analog signals being output from the stage converges on setting amplitude being set.

Abstract: An analog-to-digital (A/D) converter includes: a coarse A/D converter configured to convert, when converting an analog input signal into an N-bit digital signal, the analog input signal into a high-order m-bit digital signal; a fine A/D converter configured to convert the analog input signal into a low-order n-bit (where n=N?m) digital signal based on a conversion result of the coarse A/D converter; and a track-and-hold (TH) circuit configured to sample the analog input signal, to supply a comparison voltage compared with a coarse reference voltage to the coarse A/D converter, and to supply a comparison voltage compared with a fine reference voltage based on a conversion result of the fine A/D converter to the fine A/D converter. The TH circuit is configured to share a sampling capacitor in a selective input path for the analog input signal, the coarse reference voltage, and the fine reference voltage.

Abstract: An analog-to-digital (A/D) converter includes: a coarse A/D converter configured to convert, when converting an analog input signal into an N-bit digital signal, the analog input signal into a high-order m-bit digital signal; a fine A/D converter configured to convert the analog input signal into a low-order n-bit (where n=N?m) digital signal based on a conversion result of the coarse A/D converter; and a track-and-hold (TH) circuit configured to sample the analog input signal, to supply a comparison voltage compared with a coarse reference voltage to the coarse A/D converter, and to supply a comparison voltage compared with a fine reference voltage based on a conversion result of the fine A/D converter to the fine A/D converter. The TH circuit is configured to share a sampling capacitor in a selective input path for the analog input signal, the coarse reference voltage, and the fine reference voltage.

Abstract: An AD converter includes: AD conversion stages configured to generate digital data having a value corresponding to a relationship between two analog signals being input and amplifying two analog residual signals with a first amplifier and a second amplifier with gain to be controlled to output the signals; and a gain control part configured to control gain of the first amplifier and the second amplifier on the basis of a monitoring result of the output signals of the first amplifier and the second amplifier. The first amplifier and the second amplifier are formed of open-loop amplifiers, and the gain control part takes out amplitude information of the output signals of the first amplifier and the second amplifier in at least one of the AD conversion stages and performs gain control so that amplitude of the analog signals being output from the stage converges on setting amplitude being set.

Abstract: A comparator includes a sampling capacitor, a first switching unit which is connected to an input end of the sampling capacitor and which applies an input signal to the input end of the sampling capacitor, a second switching unit which is connected to the input end of the sampling capacitor and which applies a reference signal to the input end of the sampling capacitor, an output transistor connected to an output end of the sampling capacitor in a source follower connection manner or an emitter follower connection manner, and a third switching unit which is connected to an output end of the sampling capacitor and which maintains maintaining a voltage at the output end of the sampling capacitor to be constant. The input signal is compared with the reference signal.

Abstract: A flash A/D converter includes a reference voltage generator for generating a plurality of reference voltages, a first group of amplifiers having a plurality of amplifiers each of which amplifies a difference voltage between each reference voltage generated by the reference voltage generator and a voltage of an input signal, and a second group of amplifiers having a plurality of amplifiers. Each amplifier of the first group of amplifiers is a differential amplifier having a different pair formed of a plurality of sets of cascade-connected transistors, and has a first switch for short-circuiting respective cascade connection portions of the plurality of transistors configuring the differential pair. Each amplifier of the second group of amplifiers is a differential amplifier having a differential pair formed of at least two transistors and has a second switch for short-circuiting a portion between input units of the differential pair.

Abstract: A flash A/D converter includes a reference voltage generator for generating a plurality of reference voltages, a first group of amplifiers having a plurality of amplifiers each of which amplifies a difference voltage between each reference voltage generated by the reference voltage generator and a voltage of an input signal, and a second group of amplifiers having a plurality of amplifiers. Each amplifier of the first group of amplifiers is a differential amplifier having a differential pair formed of a plurality of sets of cascode-connected transistors, and has a first switch for short-circuiting respective cascode connection portions of the plurality of transistors configuring the differential pair. Each amplifier of the second group of amplifiers is a differential amplifier having a differential pair formed of at least two transistors and has a second switch for short-circuiting a portion between input units of the differential pair.

Abstract: A comparator includes a sampling capacitor, a first switching unit which is connected to an input end of the sampling capacitor and which applies an input signal to the input end of the sampling capacitor, a second switching unit which is connected to the input end of the sampling capacitor and which applies a reference signal to the input end of the sampling capacitor, an output transistor connected to an output end of the sampling capacitor in a source follower connection manner or an emitter follower connection manner, and a third switching unit which is connected to an output end of the sampling capacitor and which maintains maintaining a voltage at the output end of the sampling capacitor to be constant. The input signal is compared with the reference signal.

Abstract: A comparator includes a sampling capacitor, a first switching unit which is connected to an input end of the sampling capacitor and which applies an input signal to the input end of the sampling capacitor, a second switching unit which is connected to the input end of the sampling capacitor and which applies a reference signal to the input end of the sampling capacitor, an output transistor connected to an output end of the sampling capacitor in a source follower connection manner or an emitter follower connection manner, and a third switching unit which is connected to an output end of the sampling capacitor and which maintains maintaining a voltage at the output end of the sampling capacitor to be constant. The input signal is compared with the reference signal.

Abstract: A differential amplifier has an in-phase input terminal to which an input signal is applied through a first switching unit, an anti-phase input terminal to which a reference signal is applied through a second switching unit, and a third switching unit between the in-phase and anti-phase input terminals. The potential difference between the in-phase and anti-phase input terminals is differentially amplified by setting the first and second switching units to be on and the third switching unit to be off. Also, the in-phase and anti-phase input terminals are short-circuited to have a high impedance by setting the first and second switching units to be off and the third switching unit to be on.

Abstract: A comparator includes a sampling capacitor, a first switching unit which is connected to an input end of the sampling capacitor and which applies an input signal to the input end of the sampling capacitor, a second switching unit which is connected to the input end of the sampling capacitor and which applies a reference signal to the input end of the sampling capacitor, an output transistor connected to an output end of the sampling capacitor in a source follower connection manner or an emitter follower connection manner, and a third switching unit which is connected to an output end of the sampling capacitor and which maintains maintaining a voltage at the output end of the sampling capacitor to be constant. The input signal is compared with the reference signal.

Abstract: A differential amplifier has an in-phase input terminal to which an input signal is applied through a first switching unit, an anti-phase input terminal to which a reference signal is applied through a second switching unit, and a third switching unit between the in-phase and anti-phase input terminals. The potential difference between the in-phase and anti-phase input terminals is differentially amplified by setting the first and second switching units to be on and the third switching unit to be off. Also, the in-phase and anti-phase input terminals are short-circuited to have a high impedance by setting the first and second switching units to be off and the third switching unit to be on.