Patents by Inventor Yukiya Miura

Yukiya Miura has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9316684
    Abstract: A semiconductor device and the like that can determine the performance of a semiconductor integrated circuit with higher accuracy even when test environment fluctuates. The semiconductor device detects degradation of the semiconductor integrated circuit, including measurement unit that measures temperature and voltage, decision unit that judges whether the test is executed within an allowable test timing in the detection target circuit portion at each test operation frequency and decides a maximum test operation frequency and calculation unit that converts a maximum test operation frequency into that at a standard temperature and voltage and calculates a degradation amount. The semiconductor integrated circuit has a monitor block circuit that monitors the values for the measurement unit to measure temperature and voltage. The measurement unit has estimation unit that estimates temperature and voltage of a detection target circuit portion based on the monitored values.
    Type: Grant
    Filed: March 14, 2011
    Date of Patent: April 19, 2016
    Assignees: KYUSHU INSTITUTE OF TECHNOLOGY, NATIONAL UNIVERSITY CORPORATION NARA INSTITUTE OF SCIENCE AND TECHNOLOGY, TOKYO METROPOLITAN UNIVERSITY
    Inventors: Yasuo Sato, Seiji Kajihara, Michiko Inoue, Tomokazu Yoneda, Hyunbean Yi, Yukiya Miura
  • Publication number: 20130013247
    Abstract: A semiconductor device and the like that can determine the performance of a semiconductor integrated circuit with higher accuracy even when test environment fluctuates. The semiconductor device detects degradation of the semiconductor integrated circuit, including measurement unit that measures temperature and voltage, decision unit that judges whether the test is executed within an allowable test timing in the detection target circuit portion at each test operation frequency and decides a maximum test operation frequency and calculation unit that converts a maximum test operation frequency into that at a standard temperature and voltage and calculates a degradation amount. The semiconductor integrated circuit has a monitor block circuit that monitors the values for the measurement unit to measure temperature and voltage. The measurement unit has estimation unit that estimates temperature and voltage of a detection target circuit portion based on the monitored values.
    Type: Application
    Filed: March 14, 2011
    Publication date: January 10, 2013
    Applicants: KYUSHU INSTITUTE OF TECHNOLOGY, TOKYO METROPOLITAN UNIVERSITY, NATIONAL UNIVERSITY CORPORATION NARA INSTITUTE OF SCIENCE AND TECHNOLOGY
    Inventors: Yasuo Sato, Seiji Kajihara, Michiko Inoue, Tomokazu Yoneda, Hyunbean Yi, Yukiya Miura