Patents by Inventor Yuko Hanaoka

Yuko Hanaoka has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10603689
    Abstract: A structure that prevents a substrate from being warped is provided on a region or a location other than a membrane that determines the characteristics of a CMUT. In a CMUT in a structure in which a first conductive layer and a second conductive layer are provided sandwiching a cavity on a substrate, for example, as a warpage prevention structure, a warpage prevention layer that prevents the substrate from being warped is provided between the substrate and the first conductive film. When the insulating film disposed between the cavity and the first conductive film and the insulating film disposed between the cavity and the second conductive film are silicon oxide films, the warpage prevention layer includes a silicon nitride film.
    Type: Grant
    Filed: April 21, 2015
    Date of Patent: March 31, 2020
    Assignee: Hitachi, Ltd.
    Inventors: Shuntaro Machida, Daisuke Ryuzaki, Tatsuya Nagata, Naoaki Yamashita, Yuko Hanaoka, Yasuhiro Yoshimura
  • Publication number: 20170291192
    Abstract: A structure that prevents a substrate from being warped is provided on a region or a location other than a membrane that determines the characteristics of a CMUT. In a CMUT in a structure in which a first conductive layer and a second conductive layer are provided sandwiching a cavity on a substrate, for example, as a warpage prevention structure, a warpage prevention layer that prevents the substrate from being warped is provided between the substrate and the first conductive film. When the insulating film disposed between the cavity and the first conductive film and the insulating film disposed between the cavity and the second conductive film are silicon oxide films, the warpage prevention layer includes a silicon nitride film.
    Type: Application
    Filed: April 21, 2015
    Publication date: October 12, 2017
    Inventors: Shuntaro MACHIDA, Daisuke RYUZAKI, Tatsuya NAGATA, Naoaki YAMASHITA, Yuko HANAOKA, Yasuhiro YOSHIMURA
  • Patent number: 8581354
    Abstract: An object of the present invention is to enhance the reliability of an MEMS sensor formed on a semiconductor integrated circuit device. To achieve this object, a semiconductor device of the present invention comprises: a semiconductor integrated circuit device; a lower passivation film of silicon nitride, etc. . . . formed on the semiconductor integrated circuit device and having high moisture resistance and high chemical resistance; a MEMS portion formed on the lower passivation film and including a cavity 12; and an upper passivation film 11 formed on the top surface of the MEMS portion such that the MEMS portion is hermetically sealed by the upper and lower passivation films.
    Type: Grant
    Filed: April 5, 2007
    Date of Patent: November 12, 2013
    Assignee: Hitachi, Ltd.
    Inventors: Tsukasa Fujimori, Yuko Hanaoka, Hiroshi Fukuda
  • Patent number: 8129802
    Abstract: In the manufacturing technology of an integrated MEMS in which a semiconductor integrated circuit (CMOS or the like) and a micro machine are monolithically integrated on a semiconductor substrate, a technology capable of manufacturing the integrated MEMS without using a special process different from the normal manufacturing technology of a semiconductor integrated circuit is provided. A MEMS structure is formed together with an integrated circuit by using the CMOS integrated circuit process. For example, when forming an acceleration sensor, a structure composed of a movable mass, an elastic beam and a fixed beam is formed by using the CMOS interconnect technology. Thereafter, an interlayer dielectric and the like are etched by using the CMOS process to form a cavity. Then, fine holes used in the etching are sealed with a dielectric.
    Type: Grant
    Filed: July 2, 2008
    Date of Patent: March 6, 2012
    Assignee: Hitachi, Ltd.
    Inventors: Hiroshi Fukuda, Tsukasa Fujimori, Natsuki Yokoyama, Yuko Hanaoka, Takafumi Matsumura
  • Patent number: 7972886
    Abstract: Provided is a MEMS device which is robust to the misalignment and does not require the double-side wafer processing in the manufacture of a MEMS device such as an angular velocity sensor, an acceleration sensor, a combined sensor or a micromirror. After preparing a substrate having a space therein, holes are formed in a device layer at positions where fixed components such as a fixing portion, a terminal portion and a base that are fixed to a supporting substrate are to be formed, and the holes are filled with a fixing material so that the fixing material reaches the supporting substrate, thereby fixing the device layer around the holes to the supporting substrate.
    Type: Grant
    Filed: June 20, 2008
    Date of Patent: July 5, 2011
    Assignee: Hitachi, Ltd.
    Inventors: Heewon Jeong, Yasushi Goto, Yuko Hanaoka, Tsukasa Fujimori
  • Patent number: 7670861
    Abstract: The objects of the present invention are to form MEMS structures of which stress is controlled while maintaining the performance of high-performance LSI, to integrate MEMS Structures and LSI on a single chip, to electrically and chemically protect the MEMS structure and to reduce the stress of the whole movable part of the MEMS structure. To achieve the above objects, a silicide film formable at a low temperature is used for the MEMS structure. The temperature at the silicide film deposition T1 is selected optionally with reference the heat treatment temperature T2 and the pseudo-crystallization temperature T3. T2, the temperature of manufacturing process after the silicide film deposition, is determined does not cause the degradation of the characteristics of the high-performance LSI indispensable. Thus, the residual stress of the MEMS structures may be controlled.
    Type: Grant
    Filed: January 26, 2007
    Date of Patent: March 2, 2010
    Assignee: Hitachi, Ltd.
    Inventors: Yuko Hanaoka, Tsukasa Fujimori, Hiroshi Fukuda
  • Patent number: 7658109
    Abstract: A weight of an inertial sensor if formed from a plurality of divided weights, and the divided weights are connected to each other by elastically deformable beams. A movable range and a mass of each of the divided weights and a rigidity of each of the beams are adjusted and a plurality of deformation modes having different sensitivity ranges with respect to the acceleration are used in combination. By this means, it is possible to improve a detecting sensitivity of an acceleration and widen an acceleration response range.
    Type: Grant
    Filed: June 15, 2007
    Date of Patent: February 9, 2010
    Assignee: Hitachi, Ltd.
    Inventors: Hiroshi Fukuda, Yuko Hanaoka, Tsukasa Fujimori
  • Publication number: 20090064785
    Abstract: In the manufacturing technology of an integrated MEMS in which a semiconductor integrated circuit (CMOS or the like) and a micro machine are monolithically integrated on a semiconductor substrate, a technology capable of manufacturing the integrated MEMS without using a special process different from the normal manufacturing technology of a semiconductor integrated circuit is provided. A MEMS structure is formed together with an integrated circuit by using the CMOS integrated circuit process. For example, when forming an acceleration sensor, a structure composed of a movable mass, an elastic beam and a fixed beam is formed by using the CMOS interconnect technology. Thereafter, an interlayer dielectric and the like are etched by using the CMOS process to form a cavity. Then, fine holes used in the etching are sealed with a dielectric.
    Type: Application
    Filed: July 2, 2008
    Publication date: March 12, 2009
    Inventors: Hiroshi Fukuda, Tsukasa Fujimori, Natsuki Yokoyama, Yuko Hanaoka, Takafumi Matsumura
  • Publication number: 20090049911
    Abstract: In the manufacturing technology of an integrated MEMS in which a semiconductor integrated circuit (CMOS or the like) and a micro machine are monolithically integrated on a semiconductor substrate, a technology capable of manufacturing the integrated MEMS without using a special process different from the normal manufacturing technology of a semiconductor integrated circuit is provided. A MEMS structure is formed together with an integrated circuit by using the CMOS integrated circuit process. For example, when forming an acceleration sensor, a structure composed of a movable mass, an elastic beam and a fixed beam is formed by using the CMOS interconnect technology. Thereafter, an interlayer dielectric and the like are etched by using the CMOS process to form a cavity. Then, fine holes used in the etching are sealed with a dielectric.
    Type: Application
    Filed: October 10, 2008
    Publication date: February 26, 2009
    Inventors: Hiroshi Fukuda, Tsukasa Fujimori, Natsuki Yokohama, Yuko Hanaoka, Takafumi Matsumura
  • Publication number: 20090017579
    Abstract: Provided is a MEMS device which is robust to the misalignment and does not require the double-side wafer processing in the manufacture of a MEMS device such as an angular velocity sensor, an acceleration sensor, a combined sensor or a micromirror. After preparing a substrate having a space therein, holes are formed in a device layer at positions where fixed components such as a fixing portion, a terminal portion and a base that are fixed to a supporting substrate are to be formed, and the holes are filled with a fixing material so that the fixing material reaches the supporting substrate, thereby fixing the device layer around the holes to the supporting substrate.
    Type: Application
    Filed: June 20, 2008
    Publication date: January 15, 2009
    Inventors: Heewon JEONG, Yasushi Goto, Yuko Hanaoka, Tsukasa Fujimori
  • Publication number: 20080196502
    Abstract: A weight of an inertial sensor if formed from a plurality of divided weights, and the divided weights are connected to each other by elastically deformable beams. A movable range and a mass of each of the divided weights and a rigidity of each of the beams are adjusted and a plurality of deformation modes having different sensitivity ranges with respect to the acceleration are used in combination. By this means, it is possible to improve a detecting sensitivity of an acceleration and widen an acceleration response range.
    Type: Application
    Filed: June 15, 2007
    Publication date: August 21, 2008
    Inventors: Hiroshi FUKUDA, Yuko Hanaoka, Tsukasa Fujimori
  • Patent number: 7402449
    Abstract: In the manufacturing technology of an integrated MEMS in which a semiconductor integrated circuit (CMOS or the like) and a micro machine are monolithically integrated on a semiconductor substrate, a technology capable of manufacturing the integrated MEMS without using a special process different from the normal manufacturing technology of a semiconductor integrated circuit is provided. A MEMS structure is formed together with an integrated circuit by using the CMOS integrated circuit process. For example, when forming an acceleration sensor, a structure composed of a movable mass, an elastic beam and a fixed beam is formed by using the CMOS interconnect technology. Thereafter, an interlayer dielectric and the like are etched by using the CMOS process to form a cavity. Then, fine holes used in the etching are sealed with a dielectric.
    Type: Grant
    Filed: August 23, 2005
    Date of Patent: July 22, 2008
    Assignee: Hitachi, Ltd.
    Inventors: Hiroshi Fukuda, Tsukasa Fujimori, Natsuki Yokoyama, Yuko Hanaoka, Takafumi Matsumura
  • Publication number: 20080128841
    Abstract: An object of the present invention is to enhance the reliability of an MEMS sensor formed on a semiconductor integrated circuit device. To achieve this object, a semiconductor device of the present invention comprises: a semiconductor integrated circuit device; a lower passivation film of silicon nitride, etc. formed on the semiconductor integrated circuit device and having high moisture resistance and high chemical resistance; an MEMS portion formed on the lower passivation film and including a cavity 12; and an upper passivation film 11 formed on the top surface of the MEMS portion such that the MEMS portion is hermetically sealed by the upper and lower passivation films.
    Type: Application
    Filed: April 5, 2007
    Publication date: June 5, 2008
    Inventors: Tsukasa Fujimori, Yuko Hanaoka, Hiroshi Fukuda
  • Patent number: 7325457
    Abstract: A sensor and sensor module with small power consumption and high reliability are disclosed. The sensor includes a capacitor having a capacitance varying with a physical quantity, a capacitance-voltage conversion circuit for converting the capacitance of the capacitor into a voltage, and a control signal generation circuit for generating a plurality of control signals. The capacitor has a frequency-capacitance characteristic with a resonant frequency. In a measurement of the physical quantity, the capacitance of the capacitor is measured with one of the control signals having a first frequency which is much higher or much lower than the resonant frequency. In a self-diagnosis of the sensor, the capacitance of the capacitor is measured with another one of the control signals having a second frequency which is equal or close to the resonant frequency.
    Type: Grant
    Filed: July 26, 2006
    Date of Patent: February 5, 2008
    Assignee: Hitachi, Ltd.
    Inventors: Tsukasa Fujimori, Natsuki Yokoyama, Hiroshi Fukuda, Yuko Hanaoka, Takashi Azuma
  • Publication number: 20070249082
    Abstract: The objects of the present invention are to form MEMS structures of which stress is controlled while maintaining the performance of high-performance LSI, to integrate MEMS Structures and LSI on a single chip, to electrically and chemically protect the MEMS structure and to reduce the stress of the whole movable part of the MEMS structure. To achieve the above objects, a silicide film formable at a low temperature is used for the MEMS structure. The temperature at the silicide film deposition T1 is selected optionally with reference the heat treatment temperature T2 and the pseudo-crystallization temperature T3. T2, the temperature of manufacturing process after the silicide film deposition, is determined does not cause the degradation of the characteristics of the high-performance LSI indispensable. Thus, the residual stress of the MEMS structures may be controlled.
    Type: Application
    Filed: January 26, 2007
    Publication date: October 25, 2007
    Inventors: Yuko Hanaoka, Tsukasa Fujimori, Hiroshi Fukuda
  • Publication number: 20070184618
    Abstract: In order to provide a light oxidation process technique for use in a CMOS LSI employing a polymetal gate structure and a dual gate structure, so that both oxidation of a refractory metal film constituting a part of a gate electrode and diffusion of boron contained in a p-type polycrystalline silicon film constituting a part of the gate electrode can be prevented, a mixed gas containing a hydrogen gas and steam synthesized from an oxygen gas and a hydrogen gas is supplied to a major surface of a semiconductor wafer A1, and a heat treatment for improving a profile of a gate insulating film that has been cut by etching under an edge part of the gate electrode is conducted under a low thermal load condition in that the refractor metal film is substantially not oxidized, and boron contained in a p-type polycrystalline silicon film constituting a part of the gate electrode is not diffused to the semiconductor substrate through the gate oxide film.
    Type: Application
    Filed: April 16, 2007
    Publication date: August 9, 2007
    Inventors: Yoshikazu Tanabe, Naoki Yamamoto, Shinichiro Mitani, Yuko Hanaoka
  • Publication number: 20070068266
    Abstract: A sensor and sensor module with small power consumption and high reliability are disclosed. The sensor includes a capacitor having a capacitance varying with a physical quantity, a capacitance-voltage conversion circuit for converting the capacitance of the capacitor into a voltage, and a control signal generation circuit for generating a plurality of control signals. The capacitor has a frequency-capacitance characteristic with a resonant frequency. In a measurement of the physical quantity, the capacitance of the capacitor is measured with one of the control signals having a first frequency which is much higher or much lower than the resonant frequency. In a self-diagnosis of the sensor, the capacitance of the capacitor is measured with another one of the control signals having a second frequency which is equal or close to the resonant frequency.
    Type: Application
    Filed: July 26, 2006
    Publication date: March 29, 2007
    Inventors: Tsukasa Fujimori, Natsuki Yokoyama, Hiroshi Fukuda, Yuko Hanaoka, Takashi Azuma
  • Publication number: 20060205106
    Abstract: In the manufacturing technology of an integrated MEMS in which a semiconductor integrated circuit (CMOS or the like) and a micro machine are monolithically integrated on a semiconductor substrate, a technology capable of manufacturing the integrated MEMS without using a special process different from the normal manufacturing technology of a semiconductor integrated circuit is provided. A MEMS structure is formed together with an integrated circuit by using the CMOS integrated circuit process. For example, when forming an acceleration sensor, a structure composed of a movable mass, an elastic beam and a fixed beam is formed by using the CMOS interconnect technology. Thereafter, an interlayer dielectric and the like are etched by using the CMOS process to form a cavity. Then, fine holes used in the etching are sealed with a dielectric.
    Type: Application
    Filed: August 23, 2005
    Publication date: September 14, 2006
    Inventors: Hiroshi Fukuda, Tsukasa Fujimori, Natsuki Yokoyama, Yuko Hanaoka, Takafumi Matsumura
  • Patent number: 6864584
    Abstract: In extremely minute copper wiring the width or the thickness of which is equal to or shorter than approximately the double length of the mean free path of a copper atom, a value of the resistance may be larger, compared with aluminum wiring of the same extent and it is difficult to realize wiring having small resistance. To solve such a problem, aluminum wiring is used for wiring having form in which the respective resistivities ? of both wirings have the relation of ?Al<?Cu and copper wiring is used for wiring having form in which the respective resistivities ? of both wirings have the relation of ?Al??Cu. As a result, a semiconductor device which has small resistance, transmits a signal at high speed and is provided with a multilayer wiring layer can be realized.
    Type: Grant
    Filed: October 18, 2002
    Date of Patent: March 8, 2005
    Assignee: Hitachi, Ltd.
    Inventors: Yuko Hanaoka, Kenji Hinode, Kenichi Takeda, Daisuke Kodama, Noriyuki Sakuma
  • Publication number: 20040259339
    Abstract: In order to provide a light oxidation process technique for use in a CMOS LSI employing a polymetal gate structure and a dual gate structure, so that both oxidation of a refractory metal film constituting a part of a gate electrode and diffusion of boron contained in a p-type polycrystalline silicon film constituting a part of the gate electrode can be prevented, a mixed gas containing a hydrogen gas and steam synthesized from an oxygen gas and a hydrogen gas is supplied to a major surface of a semiconductor wafer A1, and a heat treatment for improving a profile of a gate insulating film that has been cut by etching under an edge part of the gate electrode is conducted under a low thermal load condition in that the refractor metal film is substantially not oxidized, and boron contained in a p-type polycrystalline silicon film constituting a part of the gate electrode is not diffused to the semiconductor substrate through the gate oxide film.
    Type: Application
    Filed: July 22, 2004
    Publication date: December 23, 2004
    Inventors: Yoshikazu Tanabe, Naoki Yamamoto, Shinichiro Mitani, Yuko Hanaoka