Patents by Inventor Yuko Kitade

Yuko Kitade has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Polishing apparatus with dressing position setting means
    Patent number: 8412370
    Abstract: While data that indicate a relationship between a dressing position P defined by a distance between a rotating shaft 11 of a polishing pad 13 and a rotating shaft 31 of a dresser 30 and shape change of the polishing pad 13 based on input of a target shape of the polishing pad 13 and alternating repetition of dressing the polishing pad 13 by the dresser 30 and measurement of shape of the polishing pad 13 by a pad shape measurement instrument 20 is acquired at a stage prior to commencement of a series of polishing steps for continuously polishing a plurality of polishing target objects (semiconductor wafer W) by a polishing tool 10, the polishing pad 13 is machined to the target shape 13 while the dressing position P is controlled, whereby the dressing position P is set during the polishing steps on the basis of a processing result of this data.
    Type: Grant
    Filed: March 23, 2006
    Date of Patent: April 2, 2013
    Assignee: Nikon Corporation
    Inventors: Toshihisa Tanaka, Atsushi Tanaka, Yuko Kitade
  • Polishing Apparatus, Method of Manufacturing Semiconductor Device Employing this Polishing Apparatus, and Semiconductor Device Manufactured by this Method of Manufacturing Semiconductor Device
    Publication number: 20100035520
    Abstract: While data that indicate a relationship between a dressing position P defined by a distance between a rotating shaft 11 of a polishing pad 13 and a rotating shaft 31 of a dresser 30 and shape change of the polishing pad 13 based on input of a target shape of the polishing pad 13 and alternating repetition of dressing the polishing pad 13 by the dresser 30 and measurement of shape of the polishing pad 13 by a pad shape measurement instrument 20 is acquired at a stage prior to commencement of a series of polishing steps for continuously polishing a plurality of polishing target objects (semiconductor wafer W) by a polishing tool 10, the polishing pad 13 is machined to the target shape 13 while the dressing position P is controlled, whereby the dressing position P is set during the polishing steps on the basis of a processing result of this data.
    Type: Application
    Filed: March 23, 2006
    Publication date: February 11, 2010
    Inventors: Toshihisa Tanaka, Atsushi Tanaka, Yuko Kitade
  • CMP polishing method and method for manufacturing semiconductor device
    Publication number: 20060046491
    Abstract: A wafer substrate having a wiring pattern formed between materials with a dielectric constant of 2 or less is polished with the polishing pressure being set at 0.01 to 0.2 psi. As a result, favorable polishing can be performed even in cases where a ultra-low-k material having the dielectric constant of 2 or less is used as an insulating material.
    Type: Application
    Filed: October 21, 2005
    Publication date: March 2, 2006
    Inventors: Susumu Hoshino, Yuko Kitade, Norio Yoshida