Patents by Inventor Yulong FANG

Yulong FANG has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20210036177
    Abstract: A method for preparing an avalanche photodiode includes preparing a mesa on a wafer, growing a sacrificial layer on an upper surface of the wafer and a side surface of the mesa, removing the sacrificial layer in an ohmic contact electrode region of the wafer, preparing an ohmic contact electrode in the ohmic contact electrode region of the wafer, removing the sacrificial layer in a non-mesa region of the wafer, growing a passivation layer on the upper surface of the wafer and the side surface of the mesa, removing the passivation layer on the upper surface of the mesa of the wafer and the passivation layer in the non-mesa region of the wafer corresponding to the ohmic contact electrode region, and removing the sacrificial layer on the upper surface of the mesa of the wafer.
    Type: Application
    Filed: September 24, 2020
    Publication date: February 4, 2021
    Inventors: Xingye Zhou, Zhihong Feng, Yuanjie LV, Xin Tan, Yuangang Wang, Xubo Song, Jia Li, Yulong Fang
  • Publication number: 20210020801
    Abstract: The disclosure is related to the technical field of semiconductors, and provides a method for manufacturing a tilted mesa and a method for manufacturing a detector. The method for manufacturing a tilted mesa comprises: coating a photoresist layer on a mesa region of a chip; heating the chip on which the photoresist layer is coated from a first preset temperature to a second preset temperature; performing etching processing on the heated chip, so as to manufacture a mesa having a preset tilting angle; and removing the photoresist layer on the mesa region of the chip after the mesa is manufactured.
    Type: Application
    Filed: September 24, 2020
    Publication date: January 21, 2021
    Inventors: Xingye Zhou, Zhihong Feng, Yuanjie LV, Xin Tan, Xubo Song, Jia Li, Yulong Fang, Yuangang Wang
  • Publication number: 20210020802
    Abstract: The disclosure provides a silicon carbide detector and a preparation method therefor. The silicon carbide detector comprises: a wafer, the wafer sequentially comprises, from bottom to top, a substrate, a silicon carbide P+ layer, an N-type silicon carbide insertion layer, an N+ type silicon carbide multiplication layer, an N-type silicon carbide absorption layer and a silicon carbide N+ layer; the doping concentration of the N-type silicon carbide insertion layer gradually increases from bottom to top, and the doping concentration of the N-type silicon carbide absorption layer gradually decreases from bottom to top; a mesa is etched on the wafer, and the mesa is etched to an upper surface of the silicon carbide P+ layer; an N-type electrode is arranged on an upper surface of the mesa, and a P-type electrode is arranged on an upper surface of a non-mesa region.
    Type: Application
    Filed: September 25, 2020
    Publication date: January 21, 2021
    Inventors: Xingye Zhou, Zhihong Feng, Yuanjie LV, Xin Tan, Yuangang Wang, Xubo Song, Jia Li, Yulong Fang
  • Patent number: 10854741
    Abstract: An enhanced HFET, comprising a HFET device body.
    Type: Grant
    Filed: December 11, 2017
    Date of Patent: December 1, 2020
    Assignee: THE 13TH RESEARCH INSTITUTE OF CHINA ELECTRONICS
    Inventors: Yuangang Wang, Zhihong Feng, Yuanjie Lv, Xin Tan, Xubo Song, Xingye Zhou, Yulong Fang, Guodong Gu, Hongyu Guo, Shujun Cai
  • Publication number: 20200279742
    Abstract: The disclosure provides a method for passivating a silicon carbide epitaxial layer, relating to the technical field of semiconductors. The method includes the following steps: introducing a carbon source and a silicon source into a reaction chamber, and growing a silicon carbide epitaxial layer on a substrate; and turning off the carbon source, introducing a nitrogen source and a silicon source into the reaction chamber, and growing a silicon nitride thin film on an upper surface of the silicon carbide epitaxial layer. The silicon nitride thin film grown by the method has few defects and high quality, and may be used as a lower dielectric layer of a gate electrode in a field effect transistor. It does not additionally need an oxidation process to form a SiO2 dielectric layer, thereby reducing device fabrication procedures.
    Type: Application
    Filed: March 19, 2018
    Publication date: September 3, 2020
    Inventors: Jia LI, Weili LU, Yulong FANG, Jiayun YIN, Bo WANG
  • Publication number: 20200075754
    Abstract: An enhanced HFET, comprising a HFET device body.
    Type: Application
    Filed: December 11, 2017
    Publication date: March 5, 2020
    Inventors: Yuangang WANG, Zhihong FENG, Yuarille LV, Xin TAN, Xubo SONG, Xingye ZHOU, Yulong FANG, Guodong GU, Hongyu GUO, Shujun CAI