Patents by Inventor Yu-Mei Lin
Yu-Mei Lin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240120376Abstract: Semiconductor structures and methods are provided. A semiconductor structure according to the present disclosure includes a first active region extending lengthwise along a first direction and having a first width along a second direction perpendicular to the first direction, a second active region extending lengthwise along the first direction and having a second width along the second direction, and an epitaxial feature sandwiched between the first active region and the second active region along the first direction. The first width is greater than the second width.Type: ApplicationFiled: January 26, 2023Publication date: April 11, 2024Inventors: Po Shao Lin, Jiun-Ming Kuo, Yuan-Ching Peng, You-Ting Lin, Yu Mei Jian
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Publication number: 20190169565Abstract: A medium for culturing Antrodia cinnamomea includes a carbon source, a nitrogen source, vitamin A, agar and a solvent. The medium includes 8-16 grams/liter of the carbon source, 0.4-1.6 grams/liter of the nitrogen source and 4 grams/liter of vitamin A. Moreover, a method for culturing Antrodia cinnamomea includes inoculating the medium with mycelia of Antrodia cinnamomea. The mycelia of Antrodia cinnamomea inoculated on the medium is cultured at 20-27° C. for 28-50 days.Type: ApplicationFiled: August 3, 2018Publication date: June 6, 2019Inventors: Chih-Hui YANG, Keng-Shiang Huang, Cheng-Ming Tsai, Yu-Mei Lin
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Patent number: 9338100Abstract: A method and apparatus aggregate a plurality of input data streams from first processors into one data stream for a second processor, the circuit and the first and second processors being provided on an electronic circuit substrate. The aggregation circuit includes (a) a plurality of ingress data ports, each ingress data port adapted to receive an input data stream from a corresponding first processor, each input data stream formed of ingress data packets, each ingress data packet including priority factors coded therein, (b) an aggregation module coupled to the ingress data ports, adapted to analyze and combine the plurality of input data steams into one aggregated data stream in response to the priority factors, (c) a memory coupled to the aggregation module, adapted to store analyzed data packets, and (d) an output data port coupled to the aggregation module, adapted to output the aggregated data stream to the second processor.Type: GrantFiled: June 24, 2013Date of Patent: May 10, 2016Assignee: Foundry Networks, LLCInventors: Yuen Fai Wong, Yu-Mei Lin, Richard A. Grenier
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Patent number: 9030937Abstract: A backplane interface adapter with error control and redundant fabric for a high-performance network switch. The error control may be provided by an administrative module that includes a level monitor, a stripe synchronization error detector, a flow controller, and a control character presence tracker. The redundant fabric transceiver of the backplane interface adapter improves the adapter's ability to properly and consistently receive narrow input cells carrying packets of data and output wide striped cells to a switching fabric.Type: GrantFiled: July 11, 2013Date of Patent: May 12, 2015Assignee: Foundry Networks, LLCInventors: Ronak Patel, Ming G. Wong, Yu-Mei Lin, Andrew Chang, Yuen Fai Wong
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Patent number: 8964754Abstract: A backplane interface adapter with error control and redundant fabric for a high-performance network switch. The error control may be provided by an administrative module that includes a level monitor, a stripe synchronization error detector, a flow controller, and a control character presence tracker. The redundant fabric transceiver of the backplane interface adapter improves the adapter's ability to properly and consistently receive narrow input cells carrying packets of data and output wide striped cells to a switching fabric.Type: GrantFiled: November 8, 2013Date of Patent: February 24, 2015Assignee: Foundry Networks, LLCInventors: Ronak Patel, Ming G. Wong, Yu-Mei Lin, Andrew Chang, Yuen Fai Wong
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Publication number: 20140153389Abstract: A method and apparatus aggregate a plurality of input data streams from first processors into one data stream for a second processor, the circuit and the first and second processors being provided on an electronic circuit substrate. The aggregation circuit includes (a) a plurality of ingress data ports, each ingress data port adapted to receive an input data stream from a corresponding first processor, each input data stream formed of ingress data packets, each ingress data packet including priority factors coded therein, (b) an aggregation module coupled to the ingress data ports, adapted to analyze and combine the plurality of input data steams into one aggregated data stream in response to the priority factors, (c) a memory coupled to the aggregation module, adapted to store analyzed data packets, and (d) an output data port coupled to the aggregation module, adapted to output the aggregated data stream to the second processor.Type: ApplicationFiled: June 24, 2013Publication date: June 5, 2014Inventors: Yuen Fai Wong, Yu-Mei Lin, Richard A. Grenier
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Publication number: 20140133488Abstract: A backplane interface adapter with error control and redundant fabric for a high-performance network switch. The error control may be provided by an administrative module that includes a level monitor, a stripe synchronization error detector, a flow controller, and a control character presence tracker. The redundant fabric transceiver of the backplane interface adapter improves the adapter's ability to properly and consistently receive narrow input cells carrying packets of data and output wide striped cells to a switching fabric.Type: ApplicationFiled: November 8, 2013Publication date: May 15, 2014Inventors: Ronak Patel, Ming G. Wong, Yu-Mei Lin, Andrew Chang, Yuen Fai Wong
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Publication number: 20140023086Abstract: A backplane interface adapter with error control and redundant fabric for a high-performance network switch. The error control may be provided by an administrative module that includes a level monitor, a stripe synchronization error detector, a flow controller, and a control character presence tracker. The redundant fabric transceiver of the backplane interface adapter improves the adapter's ability to properly and consistently receive narrow input cells carrying packets of data and output wide striped cells to a switching fabric.Type: ApplicationFiled: July 11, 2013Publication date: January 23, 2014Inventors: Ronak Patel, Ming G. Wong, Yu-Mei Lin, Andrew Chang, Yuen Fai Wong
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Patent number: 8619781Abstract: A backplane interface adapter with error control and redundant fabric for a high-performance network switch. The error control may be provided by an administrative module that includes a level monitor, a stripe synchronization error detector, a flow controller, and a control character presence tracker. The redundant fabric transceiver of the backplane interface adapter improves the adapter's ability to properly and consistently receive narrow input cells carrying packets of data and output wide striped cells to a switching fabric.Type: GrantFiled: April 8, 2011Date of Patent: December 31, 2013Assignee: Foundry Networks, LLCInventors: Ronak Patel, Ming G. Wong, Yu-Mei Lin, Andrew Chang, Yuen Fai Wong
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Patent number: 8514716Abstract: A backplane interface adapter with error control and redundant fabric for a high-performance network switch. The error control may be provided by an administrative module that includes a level monitor, a stripe synchronization error detector, a flow controller, and a control character presence tracker. The redundant fabric transceiver of the backplane interface adapter improves the adapter's ability to properly and consistently receive narrow input cells carrying packets of data and output wide striped cells to a switching fabric.Type: GrantFiled: June 4, 2012Date of Patent: August 20, 2013Assignee: Foundry Networks, LLCInventors: Ronak Patel, Ming G. Wong, Yu-Mei Lin, Andrew Chang, Yuen Fai Wong
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Patent number: 8493988Abstract: A method and apparatus aggregate a plurality of input data streams from first processors into one data stream for a second processor, the circuit and the first and second processors being provided on an electronic circuit substrate. The aggregation circuit includes (a) a plurality of ingress data ports, each ingress data port adapted to receive an input data stream from a corresponding first processor, each input data stream formed of ingress data packets, each ingress data packet including priority factors coded therein, (b) an aggregation module coupled to the ingress data ports, adapted to analyze and combine the plurality of input data steams into one aggregated data stream in response to the priority factors, (c) a memory coupled to the aggregation module, adapted to store analyzed data packets, and (d) an output data port coupled to the aggregation module, adapted to output the aggregated data stream to the second processor.Type: GrantFiled: September 13, 2010Date of Patent: July 23, 2013Assignee: Foundry Networks, LLCInventors: Yuen Fai Wong, Yu-Mei Lin, Richard A. Grenier
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Publication number: 20120236722Abstract: A backplane interface adapter with error control and redundant fabric for a high-performance network switch. The error control may be provided by an administrative module that includes a level monitor, a stripe synchronization error detector, a flow controller, and a control character presence tracker. The redundant fabric transceiver of the backplane interface adapter improves the adapter's ability to properly and consistently receive narrow input cells carrying packets of data and output wide striped cells to a switching fabric.Type: ApplicationFiled: June 4, 2012Publication date: September 20, 2012Applicant: FOUNDRY NETWORKS, LLCInventors: Ronak Patel, Ming G. Wong, Yu-Mei Lin, Andrew Chang, Yuen Fai Wong
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Publication number: 20120088372Abstract: A method of forming micro-pore structures or trench structures on a surface of a silicon wafer substrate comprises (A) forming at least a noble-metal alloy particle on the surface of the silicon wafer substrate; and (B) then followed by employing a chemical wet etching on the surface of the silicon wafer substrate. During the processes, noble-metal alloy particle is used to catalyze the oxidation of the silicon wafer substrate surface in contact therewith, and an etchant is used to simultaneous etch the silicon dioxide to result in local micro-etching at the surface of the silicon wafer substrate, thereby forming micro-pore structures or trench structures on the surface of the silicon wafer substrate. The method increases the power conversion efficiency of the solar cells and reduces the manufacturing costs so as to increase the production benefits of the solar cells.Type: ApplicationFiled: September 9, 2011Publication date: April 12, 2012Inventors: RAY CHIEN, YU-MEI LIN, WEI-CHE KAO, YI-LING CHIANG
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Publication number: 20110268108Abstract: A backplane interface adapter with error control and redundant fabric for a high-performance network switch. The error control may be provided by an administrative module that includes a level monitor, a stripe synchronization error detector, a flow controller, and a control character presence tracker. The redundant fabric transceiver of the backplane interface adapter improves the adapter's ability to properly and consistently receive narrow input cells carrying packets of data and output wide striped cells to a switching fabric.Type: ApplicationFiled: April 8, 2011Publication date: November 3, 2011Applicant: Foundry Networks, LLCInventors: Ronak Patel, Ming G. Wong, Yu-mei Lin, Andrew Chang, Yuen Fai Wong
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Patent number: 7995580Abstract: A backplane interface adapter with error control and redundant fabric for a high-performance network switch. The error control may be provided by an administrative module that includes a level monitor, a stripe synchronization error detector, a flow controller, and a control character presence tracker. The redundant fabric transceiver of the backplane interface adapter improves the adapter's ability to properly and consistently receive narrow input cells carrying packets of data and output wide striped cells to a switching fabric.Type: GrantFiled: March 9, 2009Date of Patent: August 9, 2011Assignee: Foundry Networks, Inc.Inventors: Ronak Patel, Ming G. Wong, Yu-Mei Lin, Andrew Chang, Yuen Fai Wong
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Patent number: 7948872Abstract: A backplane interface adapter with error control and redundant fabric for a high-performance network switch. The error control may be provided by an administrative module that includes a level monitor, a stripe synchronization error detector, a flow controller, and a control character presence tracker. The redundant fabric transceiver of the backplane interface adapter improves the adapter's ability to properly and consistently receive narrow input cells carrying packets of data and output wide striped cells to a switching fabric.Type: GrantFiled: March 9, 2009Date of Patent: May 24, 2011Assignee: Foundry Networks, LLCInventors: Ronak Patel, Ming G. Wong, Yu-Mei Lin, Andrew Chang, Yuen Fai Wong
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Publication number: 20110110237Abstract: A method and apparatus aggregate a plurality of input data streams from first processors into one data stream for a second processor, the circuit and the first and second processors being provided on an electronic circuit substrate. The aggregation circuit includes (a) a plurality of ingress data ports, each ingress data port adapted to receive an input data stream from a corresponding first processor, each input data stream formed of ingress data packets, each ingress data packet including priority factors coded therein, (b) an aggregation module coupled to the ingress data ports, adapted to analyze and combine the plurality of input data steams into one aggregated data stream in response to the priority factors, (c) a memory coupled to the aggregation module, adapted to store analyzed data packets, and (d) an output data port coupled to the aggregation module, adapted to output the aggregated data stream to the second processor.Type: ApplicationFiled: September 13, 2010Publication date: May 12, 2011Applicant: Foundry Networks, LLCInventors: Yuen Fai Wong, Yu-Mei Lin, Richard A. Grenier
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Patent number: 7817659Abstract: A method and apparatus aggregate a plurality of input data streams from first processors into one data stream for a second processor, the circuit and the first and second processors being provided on an electronic circuit substrate. The aggregation circuit includes (a) a plurality of ingress data ports, each ingress data port adapted to receive an input data stream from a corresponding first processor, each input data stream formed of ingress data packets, each ingress data packet including priority factors coded therein, (b) an aggregation module coupled to the ingress data ports, adapted to analyze and combine the plurality of input data steams into one aggregated data stream in response to the priority factors, (c) a memory coupled to the aggregation module, adapted to store analyzed data packets, and (d) an output data port coupled to the aggregation module, adapted to output the aggregated data stream to the second processor.Type: GrantFiled: March 26, 2004Date of Patent: October 19, 2010Assignee: Foundry Networks, LLCInventors: Yuen Fai Wong, Yu-Mei Lin, Richard A. Grenier
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Publication number: 20100034215Abstract: A backplane interface adapter with error control and redundant fabric for a high-performance network switch. The error control may be provided by an administrative module that includes a level monitor, a stripe synchronization error detector, a flow controller, and a control character presence tracker. The redundant fabric transceiver of the backplane interface adapter improves the adapter's ability to properly and consistently receive narrow input cells carrying packets of data and output wide striped cells to a switching fabric.Type: ApplicationFiled: July 17, 2009Publication date: February 11, 2010Applicant: Foundry Networks, Inc.Inventors: Ronak Patel, Ming G. Wong, Yu-mei Lin, Andrew Chang, Yuen Fai A. Wong
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Publication number: 20090290499Abstract: A backplane interface adapter with error control and redundant fabric for a high-performance network switch. The error control may be provided by an administrative module that includes a level monitor, a stripe synchronization error detector, a flow controller, and a control character presence tracker. The redundant fabric transceiver of the backplane interface adapter improves the adapter's ability to properly and consistently receive narrow input cells carrying packets of data and output wide striped cells to a switching fabric.Type: ApplicationFiled: March 9, 2009Publication date: November 26, 2009Applicant: Foundry Networks, Inc.Inventors: Ronak Patel, Ming G. Wong, Yu-mei Lin, Andrew Chang, Yuen Fai Wong