Abstract: A semiconductor device layout structure includes: an active area layout layer including a plurality of first active area patterns, and at least one second active area pattern each connected to at least two of the plurality of first active area patterns; a drain contact layer configured to form a plurality of drain contact plugs and arranged on each first active area pattern; a source contact layer configured to form a source contact plug and arranged on the at least one second active area pattern; and a gate layer including a plurality of gate patterns extending in a first direction, the plurality of gate patterns being arranged over the plurality of first active area patterns at a position away from the drain contact layer and configured to form a plurality of gates.

Abstract: Embodiments of the present disclosure belong to the technical field of semiconductor structure manufacturing, and specifically provide a semiconductor structure and a manufacturing method thereof. The manufacturing method specifically includes: a first gate structure on a substrate, a first conductive region and a second conductive region, wherein the first conductive region and the second conductive region are located at two sides of the first gate structure, and in a direction perpendicular to the substrate, the first conductive region and the second conductive region are located at different height positions.