Patents by Inventor Yumiko Ohshima

Yumiko Ohshima has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7521787
    Abstract: Disclosed is a semiconductor device, including an organic material-based substrate; a semiconductor chip, flip-chip connected to substantially a center of one surface side of the organic material-based substrate; a resin disposed to fill a space between the semiconductor chip and the organic material-based substrate; a lid member fixed to an outer peripheral region of a region the semiconductor chip is positioned at, on the one surface side of the organic material-based substrate to which the semiconductor chip is flip-chip connected and also fixed to the semiconductor chip in a side opposite to a flip-chip connected side of the flip-chip connected semiconductor chip; and a substrate support member disposed to extend from a vicinity of a portion of the lid member, the portion being fixed to the organic material-based substrate, and to protrude beyond a thickness of the organic material-based substrate in a thickness direction of the organic material-based substrate.
    Type: Grant
    Filed: May 15, 2006
    Date of Patent: April 21, 2009
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Yumiko Ohshima
  • Publication number: 20060255472
    Abstract: Disclosed is a semiconductor device, including an organic material-based substrate; a semiconductor chip, flip-chip connected to substantially a center of one surface side of the organic material-based substrate; a resin disposed to fill a space between the semiconductor chip and the organic material-based substrate; a lid member fixed to an outer peripheral region of a region the semiconductor chip is positioned at, on the one surface side of the organic material-based substrate to which the semiconductor chip is flip-chip connected and also fixed to the semiconductor chip in a side opposite to a flip-chip connected side of the flip-chip connected semiconductor chip; and a substrate support member disposed to extend from a vicinity of a portion of the lid member, the portion being fixed to the organic material-based substrate, and to protrude beyond a thickness of the organic material-based substrate in a thickness direction of the organic material-based substrate.
    Type: Application
    Filed: May 15, 2006
    Publication date: November 16, 2006
    Inventor: Yumiko Ohshima
  • Patent number: 6486001
    Abstract: According to a fabricating method of the present invention, a cap shaped cover plate having a concaved portion on the inner surface is mounted on the rear surface of a semiconductor chip. After solder bumps are formed on a connecting pad of a wiring substrate, a fluid resin layer is formed on the bump formed surface. Thereafter, the semiconductor chip with the cover plate adhered is mounted with a face down on the resin layer formed surface of the wiring substrate. The solder bumps on the chip side and the solder bumps on the substrate side are contacted. At that time, the peripheral portion of the cover plate is contacted and adhered to the wiring substrate. Thereafter, while the bumps on the chip side and the bumps on the substrate side are being heated, melted, and connected, the fluid resin layer on the wiring substrate is hardened. Thus, the space between the semiconductor chip and the wiring substrate (namely, the height of the bumps) is controlled to a predetermined value.
    Type: Grant
    Filed: March 9, 2000
    Date of Patent: November 26, 2002
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Yumiko Ohshima, Naoko Yamaguchi
  • Patent number: 6379484
    Abstract: An apparatus is provided for manufacturing a semiconductor package of the type in which a gap between a semiconductor chip and a mount board is filled with a resin. The apparatus includes resin supply means for supplying the resin along one side of the semiconductor chip, and resin supply control means for controlling the amount of resin supplied by the resin supply means such that more resin is supplied near the central portion of the semiconductor chip than near the end portions of the semiconductor chip. Also provided is a method that includes the steps of connecting the semiconductor chip and the mount board, and supplying the resin along one side of the semiconductor chip in such a manner that more resin is supplied near a central portion of the semiconductor chip than near the end portions of the semiconductor chip.
    Type: Grant
    Filed: December 5, 2000
    Date of Patent: April 30, 2002
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Takahito Nakazawa, Hiroshi Nomura, Yumiko Ohshima
  • Publication number: 20010000754
    Abstract: An apparatus is provided for manufacturing a semiconductor package of the type in which a gap between a semiconductor chip and a mount board is filled with a resin. The apparatus includes resin supply means for supplying the resin along one side of the semiconductor chip, and resin supply control means for controlling the amount of resin supplied by the resin supply means such that more resin is supplied near the central portion of the semiconductor chip than near the end portions of the semiconductor chip. Also provided is a method that includes the steps of connecting the semiconductor chip and the mount board, and supplying the resin along one side of the semiconductor chip in such a manner that more resin is supplied near a central portion of the semiconductor chip than near the end portions of the semiconductor chip.
    Type: Application
    Filed: December 5, 2000
    Publication date: May 3, 2001
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Takahito Nakazawa, Hiroshi Nomura, Yumiko Ohshima
  • Patent number: 6191024
    Abstract: An apparatus is provided for manufacturing a semiconductor package of the type in which a gap between a semiconductor chip and a mount board is filled with a resin. The apparatus includes resin supply means for supplying the resin along one side of the semiconductor chip, and resin supply control means for controlling the amount of resin supplied by the resin supply means such that more resin is supplied near the central portion of the semiconductor chip than near the end portions of the semiconductor chip. Also provided is a method that includes the steps of connecting the semiconductor chip and the mount board, and supplying the resin along one side of the semiconductor chip in such a manner that more resin is supplied near a central portion of the semiconductor chip than near the end portions of the semiconductor chip.
    Type: Grant
    Filed: April 20, 1999
    Date of Patent: February 20, 2001
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Takahito Nakazawa, Hiroshi Nomura, Yumiko Ohshima
  • Patent number: 6011312
    Abstract: A semiconductor package is provided that includes a semiconductor chip that is mounted on a mount board with metal bumps interposed therebetween so as to create a gap. A structure is provided in the gap for limiting the flow of a resin, which is deposited along side the semiconductor chip, around the peripheral portion of the semiconductor chip. The structure increases the resistance to the flow of the resin in the peripheral portion of the semiconductor chip. Therefore, the rate at which the resin flows in the peripheral portion of the semiconductor chip is made lower than the rate at which the resin flows near the central portion of semiconductor chip. Accordingly, the formation of a resin-less void in the gap is suppressed so that the grade and quality of the semiconductor device is improved. In one embodiment, the structure in the gap includes projections provided on a portion of the mount board that corresponds to the peripheral portion of the semiconductor chip.
    Type: Grant
    Filed: July 29, 1997
    Date of Patent: January 4, 2000
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Takahito Nakazawa, Yumiko Ohshima
  • Patent number: 5935375
    Abstract: An apparatus is provided for manufacturing a semiconductor package of the type in which a gap between a semiconductor chip and a mount board is filled with a resin. The apparatus includes resin supply means for supplying the resin along one side of the semiconductor chip, and resin supply control means for controlling the amount of resin supplied by the resin supply means such that more resin is supplied near the central portion of the semiconductor chip than near the end portions of the semiconductor chip. Also provided is a method that includes the steps of connecting the semiconductor chip and the mount board, and supplying the resin along one side of the semiconductor chip in such a manner that more resin is supplied near a central portion of the semiconductor chip than near the end portions of the semiconductor chip.
    Type: Grant
    Filed: July 29, 1997
    Date of Patent: August 10, 1999
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Takahito Nakazawa, Hiroshi Nomura, Yumiko Ohshima
  • Patent number: 5677246
    Abstract: In the disclosed method of manufacturing semiconductor devices with a single-sided resin-sealed package structure, when resin is filled into between the chip and the substrate, the occurrence of variations in the finishing dimensions of the package or defects in the outward appearance of the package is prevented.
    Type: Grant
    Filed: November 28, 1995
    Date of Patent: October 14, 1997
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Hideaki Maeta, Katsuhiko Oyama, Hiroshi Iwasaki, Yumiko Ohshima, Takahito Nakazawa