Patents by Inventor Yu-Min Chen
Yu-Min Chen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240146205Abstract: A flyback power converter includes a power transformer, a first lossless voltage conversion circuit, a first low-dropout linear regulator and a secondary side power supply circuit. The first low-dropout linear regulator (LDO) generates a first operation voltage as power supply for being supplied to a sub-operation circuit. The secondary side power supply circuit includes a second lossless voltage conversion circuit and a second LDO. The second LDO generates a second operation voltage. The first operation voltage and the second operation voltage are shunted to a common node. When a first lossless conversion voltage is greater than a first threshold voltage, the second LDO is enabled to generate the second operation voltage to replace the first operation voltage as power supply supplied to the sub-operation circuit; wherein the second lossless conversion voltage is lower than the first lossless switching voltage.Type: ApplicationFiled: September 23, 2023Publication date: May 2, 2024Inventors: Shin-Li Lin, He-Yi Shu, Shih-Jen Yang, Ta-Yung Yang, Yi-Min Shiu, Chih-Ching Lee, Yu-Chieh Hsieh, Chao-Chi Chen
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Publication number: 20240136317Abstract: According to an exemplary embodiment, a substrate having a first area and a second area is provided. The substrate includes a plurality of pads. Each of the pads has a pad size. The pad size in the first area is larger than the pad size in the second area.Type: ApplicationFiled: January 3, 2024Publication date: April 25, 2024Inventors: Wei-Hung Lin, Hsiu-Jen Lin, Ming-Da Cheng, Yu-Min Liang, Chen-Shien Chen, Chung-Shi Liu
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Publication number: 20240124706Abstract: A liquid crystal polymer, composition, liquid crystal polymer film, laminated material and method of forming liquid crystal polymer film are provided. The liquid crystal polymer includes a first repeating unit, a second repeating unit, a third repeating unit, and a fourth repeating unit. The first repeating unit has a structure of Formula (I), the second repeating unit has a structure of Formula (II), the third repeating unit has a structure of Formula (III), and the fourth repeating unit has a structure of Formula (IV), a structure of Formula (V) or a structure of Formula (VI) wherein A1, A2, A3, Z1, R1, R2, R3 and Q are as defined in the specification.Type: ApplicationFiled: September 22, 2023Publication date: April 18, 2024Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTEInventors: Yu-Lin CHU, Jen-Chun CHIU, Po- Hsien HO, Yu-Min HAN, Meng-Hsin CHEN, Chih-Hsiang LIN
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Publication number: 20240130141Abstract: A layout pattern for magnetoresistive random access memory (MRAM) includes a substrate having a first active region, a second active region, and a word line connecting region between the first active region and the second active region, a first gate pattern extending along a first direction from the first active region to the second active region, a second gate pattern extending along the first direction from the first active region to the second active region, a first magnetic tunneling junction (MTJ) between the first gate pattern and the second pattern and within the word line connecting region, and a second MTJ between the first gate pattern and the second gate pattern in the first active region. Preferably, top surfaces of the first MTJ and the second MTJ are coplanar.Type: ApplicationFiled: December 25, 2023Publication date: April 18, 2024Applicant: United Microelectronics Corp.Inventors: Ya-Huei Tsai, Rai-Min Huang, Yu-Ping Wang, Hung-Yueh Chen
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Publication number: 20240128626Abstract: A transmission device includes a daisy chain structure composed of at least three daisy chain units arranged periodically and continuously. Each of the daisy chain units includes first, second and third conductive lines, and first and second conductive pillars. The first and second conductive lines at a first layer extend along a first direction and are discontinuously arranged. The third conductive line at a second layer extends along the first direction and is substantially parallel to the first and second conductive lines. The first conductive pillar extends in a second direction. The second direction is different from the first direction. A first part of the first conductive pillar is connected to the first and third conductive lines. The second conductive pillar extends in the second direction. A first part of the second conductive pillar is connected to the second and third conductive lines.Type: ApplicationFiled: November 25, 2022Publication date: April 18, 2024Applicants: UNIMICRON TECHNOLOGY CORP., National Taiwan UniversityInventors: Yu-Kuang WANG, Ruey-Beei Wu, Ching-Sheng Chen, Chun-Jui Huang, Wei-Yu Liao, Chi-Min Chang
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Publication number: 20240128106Abstract: The invention discloses a container for a non-rectangular reticle, adapted for accommodating an elliptical reticle, and including a cover and a base which are configured to define an elliptical space when engaged with each other. The cover and the base have reticle retainers and reticle supports, respectively, which are configured to securely hold the elliptical reticle.Type: ApplicationFiled: September 21, 2023Publication date: April 18, 2024Inventors: Ming-Chien CHIU, Chia-Ho CHUANG, Hsin-Min HSUEH, Yu-Ruei CHEN
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Publication number: 20240113187Abstract: The present disclosure relates to an integrated chip. The integrated chip includes a substrate having one or more interior surfaces forming a recess within an upper surface of the substrate. Source/drain regions are disposed within the substrate on opposing sides of the recess. A first gate dielectric is arranged along the one or more interior surfaces forming the recess, and a second gate dielectric is arranged on the first gate dielectric and within the recess. A gate electrode is disposed on the second gate dielectric. The second gate dielectric includes one or more protrusions that extend outward from a recessed upper surface of the second gate dielectric and that are arranged along opposing sides of the second gate dielectric.Type: ApplicationFiled: January 5, 2023Publication date: April 4, 2024Inventors: Jhu-Min Song, Ying-Chou Chen, Yi-Kai Ciou, Chien-Chih Chou, Fei-Yun Chen, Yu-Chang Jong, Chi-Te Lin
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Publication number: 20240100352Abstract: A phototherapy device includes a base, at least one light conversion device and a light source module. The base has an installation slot. The light conversion device is detachably arranged in the installation slot. Each light conversion device includes a plurality of light conversion patterns. The light source module is arranged on a side of the base and configured to provide an excitation beam to the light conversion patterns, so that each of the light conversion patterns emits a converted beam. In this way, the light conversion device of the phototherapy device can be replaced according to the user's needs.Type: ApplicationFiled: September 19, 2023Publication date: March 28, 2024Inventors: CHUNG-JEN OU, YU-MIN CHEN, MING-WEI TSAI, CHIEN-CHIH CHEN
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Publication number: 20240107087Abstract: The subject application relates to a server, terminal and non-transitory computer-readable medium. The server for handling streaming data for a live streaming, comprising one or a plurality of processors, wherein the one or plurality of processors execute a machine-readable instruction to perform: recording the streaming data for the live streaming; storing the streaming data as archive contents with first identifier; receiving interaction information during the live streaming; storing the interaction information as contexts with second identifier, transmitting the archive contents with first identifier to a first user terminal; and transmitting the contexts to the first user terminal according to the first identifier and the second identifier. According to the subject application, the archive contents may be more immersive and the user experience may be enhanced.Type: ApplicationFiled: June 26, 2023Publication date: March 28, 2024Inventors: Yu-Chuan CHANG, Kun-Ze LI, Che-Wei LIU, Chieh-Min CHEN, Kuan-Hung LIU
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Patent number: 11939603Abstract: A modified cutinase is disclosed. The cutinase has the modified amino acid sequence of SEQ ID NO: 2, wherein the modification is a substitution of asparagine at position 181 with alanine, or substitutions of asparagine at position 181 with alanine and phenylalanine at position 235 with leucine. The modified enzyme has improved PET-hydrolytic activity, and thus, the high-activity PET hydrolase is obtained, and the industrial application value of the PET hydrolase is enhanced.Type: GrantFiled: June 21, 2023Date of Patent: March 26, 2024Assignee: HUBEI UNIVERSITYInventors: Chun-Chi Chen, Jian-Wen Huang, Jian Min, Xian Li, Beilei Shi, Panpan Shen, Yu Yang, Yumei Hu, Longhai Dai, Lilan Zhang, Yunyun Yang, Rey-Ting Guo
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Publication number: 20240079423Abstract: A CIS has a monolithic transfer gate electrode embedded in the semiconductor substrate. In some embodiments, the transfer gate electrode is below the surface. In some embodiments, the top of the transfer gate electrode is nearly even with or below a bottom of a floating diffusion region. In some embodiments, the transfer gate electrode wraps partially around the area of the floating diffusion region. In some embodiments, the transfer gate electrode wraps entirely around the area of the floating diffusion region. Embedding the transfer gate in the substrate reduces surface crowding and allows a scale reduction. The wrapping of the transfer gate electrode around the area of the floating diffusion region increases the area of the transfer gate channel while limiting the area that is occupied by the transfer gate.Type: ApplicationFiled: January 4, 2023Publication date: March 7, 2024Inventors: Szu-Ying Chen, Yu-Min Liao
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Publication number: 20240068498Abstract: A fastener includes a bolt including a head and a threaded shank including a bare section proximate the head, an end section having a wider end and having a plurality of alternate grooves and ridges, an intermediate section proximate the end section and having a spiral trough, and a threaded section between the intermediate section and the bare section; and a hollow member including a head member and a malleable shank having a plurality of holes. The end section is tapered toward the intermediate section at an angle of 3-degree to 8-degree.Type: ApplicationFiled: October 30, 2023Publication date: February 29, 2024Inventor: Yu-Min Chen
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Publication number: 20240071954Abstract: A memory device including a base semiconductor die, conductive terminals, memory dies, an insulating encapsulation and a buffer cap is provided. The conductive terminals are disposed on a first surface of the base semiconductor die. The memory dies are stacked over a second surface of the base semiconductor die, and the second surface of the base semiconductor die is opposite to the first surface of the base semiconductor die. The insulating encapsulation is disposed on the second surface of the base semiconductor die and laterally encapsulates the memory dies. The buffer cap covers the first surface of the base semiconductor die, sidewalls of the base semiconductor die and sidewalls of the insulating encapsulation. A package structure including the above-mentioned memory device is also provided.Type: ApplicationFiled: November 9, 2023Publication date: February 29, 2024Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Kai-Ming Chiang, Chao-wei Li, Wei-Lun Tsai, Chia-Min Lin, Yi-Da Tsai, Sheng-Feng Weng, Yu-Hao Chen, Sheng-Hsiang Chiu, Chih-Wei Lin, Ching-Hua Hsieh
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Publication number: 20240071953Abstract: A memory device including a base semiconductor die, conductive terminals, memory dies, an insulating encapsulation and a buffer cap is provided. The conductive terminals are disposed on a first surface of the base semiconductor die. The memory dies are stacked over a second surface of the base semiconductor die, and the second surface of the base semiconductor die is opposite to the first surface of the base semiconductor die. The insulating encapsulation is disposed on the second surface of the base semiconductor die and laterally encapsulates the memory dies. The buffer cap covers the first surface of the base semiconductor die, sidewalls of the base semiconductor die and sidewalls of the insulating encapsulation. A package structure including the above- mentioned memory device is also provided.Type: ApplicationFiled: November 6, 2023Publication date: February 29, 2024Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Kai-Ming Chiang, Chao-wei Li, Wei-Lun Tsai, Chia-Min Lin, Yi-Da Tsai, Sheng-Feng Weng, Yu-Hao Chen, Sheng-Hsiang Chiu, Chih-Wei Lin, Ching-Hua Hsieh
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Patent number: 11916471Abstract: An example electronic device includes a controller to determine a user touch detection by a power adaptor coupled to the electronic device to operate the electronic device in an AC power mode. The power adaptor may comprise a proximity sensor to detect a user touch for detachment of the power adaptor from the electronic device, and a control circuit to operate a configuration pin in a low output mode to signal user touch detection. The controller may initiate central processing unit (CPU) throttling to reduce power consumption by the electronic device. The controller may further stop CPU throttling in response to detecting that the power adaptor has been detached from the electronic device. Further, the controller may switch the electronic device to a DC power mode to operate using DC power supplied by a battery of the electronic device in response to power adaptor detachment.Type: GrantFiled: October 18, 2019Date of Patent: February 27, 2024Assignee: Hewlett-Packard Development Company, L.P.Inventors: Ting-Yang Tsai, Yi-Chen Chen, Ching-Lung Wang, Yu-Min Shen
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Patent number: 11899072Abstract: A method for estimating DoD of a battery includes obtaining voltage Va at a first electric charge rate A(Ia) and voltage Vb at a second electric charge rate B(Ib) by checking a voltage-DoD table based on DoD of an experimental battery respectively; measuring voltage V of the experimental battery; substituting Ia, Ib, Va, Vb and V into an expression to calculate an estimated current lest; and using a Coulomb counter to update the voltage-DoD table and estimate the DoD of the experimental battery.Type: GrantFiled: July 30, 2021Date of Patent: February 13, 2024Assignee: Joules Miles Co., Ltd.Inventor: Yu Min Chen
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Publication number: 20230369299Abstract: A display device including a light source module and a wavelength conversion module is provided. The light source module includes a substrate, a plurality of first LED elements and a second LED element. The first LED elements are configured for providing a plurality of first color lights, and the second LED element is configured for providing a second color light. The wavelength conversion module is overlapped and arranged on the light source module, and the wavelength conversion module includes a wavelength conversion element and at least one dichroic filter layer. The wavelength conversion element is configured to absorb the first color lights emitted by a part of the first LED elements and excite a converted light beam, wherein a color of the converted light beam is different from that of the first color lights and the second color light.Type: ApplicationFiled: May 2, 2023Publication date: November 16, 2023Applicant: Coretronic CorporationInventors: Chien-Chih Chen, Ming-Wei Tsai, Chung-Jen Ou, Yu-Min Chen
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Publication number: 20230369546Abstract: A light source device and a manufacturing method of the light source device is provided. The light source device includes a micro light-emitting element layer, a transparent substrate and a wavelength conversion module. The wavelength conversion module includes a first wavelength conversion layer, a second wavelength conversion layer, a light transmission layer, multiple barrier structures, multiple reflection layers and a light cut-off layer. The first wavelength conversion layer, the second wavelength conversion layer, and the light transmission layer are arranged in an arrangement direction. Any two of the first wavelength conversion layer, the second wavelength conversion layer, and the light transmission layer are separated from each other by one of the barrier structures. The reflection layers are located between the barrier structures and any one of a sidewall of the first wavelength conversion layer, a sidewall of the second wavelength conversion layer, and a sidewall of the light transmission layer.Type: ApplicationFiled: May 11, 2023Publication date: November 16, 2023Applicant: Coretronic CorporationInventors: Chien-Chih Chen, Ming-Wei Tsai, Chung-Jen Ou, Yu-Min Chen
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Publication number: 20210356526Abstract: A method for estimating DoD of a battery includes obtaining voltage Va at a first electric charge rate A(Ia) and voltage Vb at a second electric charge rate B(Ib) by checking a voltage-DoD table based on DoD of an experimental battery respectively; measuring voltage V of the experimental battery; substituting Ia, Ib, Va, Vb and V into an expression to calculate an estimated current lest; and using a Coulomb counter to update the voltage-DoD table and estimate the DoD of the experimental battery.Type: ApplicationFiled: July 30, 2021Publication date: November 18, 2021Inventor: Yu Min Chen
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Publication number: 20210356528Abstract: A method for evaluating SoH of a battery includes measuring current in a circuit of a control battery to obtain Ia and measuring current in a circuit of an experimental battery to obtain Ib respectively; obtaining voltage Va of the control battery by checking a voltage-DoD table of the control battery based on Ia, and obtaining voltage Vb of the experimental battery by checking a voltage-DoD table of the experimental battery based on Ib respectively; substituting Ia, Ib, Va, Vb and V into a first expression to calculate an estimated current lest where V is an ideal voltage value; and substituting lest and I into a second expression to evaluate the SoH of the battery where I is a real current value.Type: ApplicationFiled: July 30, 2021Publication date: November 18, 2021Inventor: Yu Min Chen