Abstract: Digital signal processing for mud pulse telemetry utilizes a variety of “On/Off” keying based modulation schemes, such as pulse width modulation (PWM) and pulse position modulation (PPM), to encode and/or decode information. A combination of PPM and PWM is disclosed that increases a bit rate while keeping a chip rate unchanged. The combination of PPM and PWM comprises determining a drilling condition and forming a message based on the drilling condition, forming a string of symbol values comprising the message, identifying a pulse width and a pulse start for the pulse based on a symbol value, providing a first pulse at a selected chip location, providing subsequent pulses to form the pulse width, and forming a quiet period at the end of the pulse width.

Abstract: Systems and methods for digital signal processing are provided. A method includes mapping a symbol in a pulse sequence by using a pulse width and a pulse start in the symbol, reading a message using a symbol value for each symbol in a string of symbols, and modifying a drilling configuration according to the message. A device configured to perform the above method is also provided.

Abstract: Systems and methods for filtering pump interference in mud pulse telemetry are provided. A method includes receiving a monitor output, selecting an adaptive factor in an adaptive filter module, and adjusting the adaptive factor when the adaptive filter module has reached convergence. The method may further include receiving a sensor input, providing a filtered signal output, and modifying a drill configuration based on the signal output. A system configured to perform the method above is provided. A method as above further including modifying a drill configuration based on the signal output is provided.

Abstract: Systems and methods for filtering pump interference in mud pulse telemetry are provided. A method includes receiving a monitor output, selecting an adaptive factor in an adaptive filter module, and adjusting the adaptive factor when the adaptive filter module has reached convergence. The method may further include receiving a sensor input, providing a filtered signal output, and modifying a drill configuration based on the signal output. A system configured to perform the method above is provided. A method as above further including modifying a drill configuration based on the signal output is provided.

Abstract: A networking device includes a packet header protect generator, a transmitter, a receiver, a decoder and router. The transmitter transmits a data packet to the receiver. The data packet includes a data packet header. The packet header protection generator is arranged to toggle selected bits of a protected portion of the data packet header and generate a data integrity signature. The receiver receives the data packet and generates a received data integrity signature. The decoder computes a locally computed data integrity signature in response to the protected portion of the received data packet header. The locally computed data integrity signature is compared with the received data integrity signature. The router selects a portion of a routing path in response to whether a data packet forwarding destination includes a decoder arranged to compute a locally computed data integrity signature.

Abstract: A scalable communication system for data transmission in oil and gas well applications. The communication system includes a high-speed fiber optic line connecting a surface module to a downhole module. The downhole module is further connected to a tool bus which in turn is connected to one or more tool modules. Each tool module permits communication of data to and/or from one or more downhole tools. A broadband signal comprising multiple channels may be used to transmit data to and from the tool modules.

Abstract: Systems and methods for digital signal processing are provided. A method includes mapping a symbol in a pulse sequence by using a pulse width and a pulse start in the symbol, reading a message using a symbol value for each symbol in a string of symbols, and modifying a drilling configuration according to the message. A device configured to perform the above method is also provided.

Abstract: A range-pattern-matching-type DRC-based process hotspot detection is provided that considers edge tolerances and incomplete specification (“don't care”) regions in foundry-provided hotspot patterns. First, all possible topological patterns are enumerated for the foundry-provided hotspot pattern. Next, critical topological features are extracted from each pattern topology and converted to critical design rules using Modified Transitive Closure Graphs (MTCGs). Third, the extracted critical design rules are arranged in an order that facilitates searching space reduction techniques, and then the DRC process is sequentially repeated on a user's entire layout pattern for each critical design rule in a first group, then searching space reduction is performed to generate a reduced layout pattern, and then DRC process is performed for all remaining critical design rules using the reduced layout pattern.

Abstract: An apparatus having a first circuit and a second circuit. The first circuit may be configured to buffer an input signal received as a single-ended signal from a data bus connected between a memory channel and a memory controller. The second circuit may be configured to condition the input signal relative to a reference voltage to generate a differential signal. The reference voltage may be isolated from the second circuit in response to a transition from a power down condition to a power on condition.

Abstract: A range-pattern-matching-type DRC-based process hotspot detection is provided that considers edge tolerances and incomplete specification (“don't care”) regions in foundry-provided hotspot patterns. First, all possible topological patterns are enumerated for the foundry-provided hotspot pattern. Next, critical topological features are extracted from each pattern topology and converted to critical design rules using Modified Transitive Closure Graphs (MTCGs). Third, the extracted critical design rules are arranged in an order that facilitates searching space reduction techniques, and then the DRC process is sequentially repeated on a user's entire layout pattern for each critical design rule in a first group, then searching space reduction is performed to generate a reduced layout pattern, and then DRC process is performed for all remaining critical design rules using the reduced layout pattern.

Abstract: A networking device includes a packet header protect generator, a transmitter, a receiver, a decoder and router. The transmitter transmits a data packet to the receiver. The data packet includes a data packet header. The packet header protection generator is arranged to toggle selected bits of a protected portion of the data packet header and generate a data integrity signature. The receiver receives the data packet and generates a received data integrity signature. The decoder computes a locally computed data integrity signature in response to the protected portion of the received data packet header. The locally computed data integrity signature is compared with the received data integrity signature. The router selects a portion of a routing path in response to whether a data packet forwarding destination includes a decoder arranged to compute a locally computed data integrity signature.

Abstract: A networking device includes a packet header protect generator, a transmitter, a receiver, a decoder and router. The transmitter transmits a data packet to the receiver. The data packet includes a data packet header. The packet header protection generator is arranged to toggle selected bits of a protected portion of the data packet header and generate a data integrity signature. The receiver receives the data packet and generates a received data integrity signature. The decoder computes a locally computed data integrity signature in response to the protected portion of the received data packet header. The locally computed data integrity signature is compared with the received data integrity signature. The router selects a portion of a routing path in response to whether a data packet forwarding destination includes a decoder arranged to compute a locally computed data integrity signature.

Abstract: A packet header protection system includes, for example, a header checksum (CS) that is arranged to provide error detection capability to FSK (frequency shift keyed) packet headers. Accordingly, receivers in the network can more quickly terminate processing of an errored packet upon detection of error(s) in the header. Quickly detecting packet header errors helps to avoid a sequence of compounding errors such as the repeated transmissions of a packet having an undetected erroneous header. Accordingly, the packet header protection system reduces false alarm rate in the network and increases network throughput.

Abstract: A voltage regulator includes an amplifier to generate a difference voltage responsive to a comparison of a reference voltage and a feedback voltage. An output driver is coupled to the amplifier and drives a regulated output voltage responsive to the difference voltage. An impedance circuit is coupled between the output driver and a low power source and establishes the feedback voltage responsive to a current through the impedance circuit. A variation detector is operably coupled between the regulated output voltage and the difference voltage and is configured to modify the difference voltage. In some embodiments, the difference voltage is modified responsive to a rapid change of the regulated output voltage capacitively coupled to the variation detector. In other embodiments, the difference voltage is modified responsive to a rapid change of the feedback voltage capacitively coupled to the variation detector.

Abstract: An integrated circuit device includes a reference voltage generator, which is configured to generate an adaptive reference voltage (Vref) that varies inversely relative to changes in magnitude of a data signal (DATA) received at an input thereof. This reference voltage generator includes a totem pole arrangement of at least two variable impedance elements having control terminals capacitively coupled (by respective capacitors) to the input. A current mirror is electrically coupled to the totem pole arrangement of at least two variable impedance elements. A comparator is also included. The comparator has a first input terminal that receives the adaptive reference voltage and a second input terminal that receives the data signal.

Abstract: An output driver that includes a pull-up network comprising a first plurality of resistive branches forming a first R-2R resistive ladder structure, wherein the resistive branches of the pull-up network are coupled to a high voltage supply through pull-up switching transistors. The output driver may further include a pull-down network comprising a second plurality of resistive branches forming a second R-2R resistive ladder structure, wherein the resistive branches of the pull-down network are coupled to a low voltage supply through pull-down switching transistors. The output driver includes a control circuit to selectively activate or deactivate each of the first plurality of resistive branches and to selectively activate or deactivate each of the second plurality of resistive branches.

Abstract: A voltage regulator includes an amplifier to generate a difference voltage responsive to a comparison of a reference voltage and a feedback voltage. An output driver is coupled to the amplifier and drives a regulated output voltage responsive to the difference voltage. An impedance circuit is coupled between the output driver and a low power source and establishes the feedback voltage responsive to a current through the impedance circuit. A variation detector is operably coupled between the regulated output voltage and the difference voltage and is configured to modify the difference voltage. In some embodiments, the difference voltage is modified responsive to a rapid change of the regulated output voltage capacitively coupled to the variation detector. In other embodiments, the difference voltage is modified responsive to a rapid change of the feedback voltage capacitively coupled to the variation detector.

Abstract: The invention relates to macroporous absorbent resin special for extracting cephalosporin C and process for preparation. Specific surface area of such kinds of adsorbent resins is around 1000-2000 m2/g, pore volume is 1.5-2.5 ml/g. The preparation method is as follows: according to the suspension polymerization to prepare the macroporous copolymer matrix. The mixture of monomer, porogenic agent, initiator of polymerization was put into solution of dissolving some dispersant, then system was heated to 60-100 C.°, and maintained for 5-10 hours, then crosslinked macroporous copolymer matrix is obtained. With the existence of inert medium, the above described macroporous copolymer matrix reacted with Lewis acid as catalyst at 50-120 C.° though the alkylate reaction between the aromatic nucleus.

Abstract: A method and apparatus for transmitting an input data signal over an information channel. The input data signal comprises a sequence of data blocks. A puncture coded signal is generated for each data block in the sequence of data blocks. The total number of bits in the puncture coded signal is equal to the number of bits in a particular data block plus additional error correcting bits used to perform error correction at a receiver. The number of error correcting bits is adaptively adjusted for each data block in response to a channel quality measure for the information channel.

Abstract: Disclosed herein is a method and apparatus for providing echo cancellation. A plurality of reflections is received. A first strong reflection of the plurality of reflections is selected as a main path. The first strong reflection is then demodulated.