Abstract: A memory circuit includes first and second NVM devices and a driver circuit including first and second power switches and first and second drivers. The first and second power switches generate first and second power signals, the first and second drivers output first and second activation signals to the first and second NVM devices responsive to the first and second power signals, respectively, and the driver circuit is configured to output a third activation signal having a voltage less than that of the first activation signal to the first NVM device and to output a fourth activation signal having a voltage less than that of the second activation signal to the second NVM device. The first activation signal and the third activation signal are based on a first enable signal, and the second activation signal and the fourth activation signal are based on a second enable signal.

Abstract: A Schottky diode includes a substrate with an epitaxy layer on which a cathode region and an anode region are defined. A cathode structure and an anode structure are formed in the cathode region and the anode region respectively and horizontally separated by a distance. The anode structure includes a plurality of p-type doped regions diffused from the epitaxy layer toward the substrate, with an interval is formed between adjacent two p-type doped regions. A backside metal film and a backside protection layer are sequentially formed on a back surface of the substrate. Since the manufacturing of the Schottky diode does not involve wire bonding and molding processes, the overall thickness of the Schottky diode is reduced and heat dissipation is improved. With the backside metal film on the back side of the substrate, an equivalent resistance and a forward voltage of the Schottky diode can be reduced.

Abstract: A vapor deposition system is described. The vapor deposition system includes a reaction chamber and a reactant delivery subsystem coupled with the reaction chamber. The reaction chamber is configured to retain a substrate therein. The reactant delivery subsystem includes inlets, a pre-reaction region, and outlets. The inlets receive precursors and chalcogen precursor(s). The pre-reaction region is configured to receive the precursors from a portion of the inlets and to react at least a portion of the precursors to form modified precursor(s). The modified precursor(s) are more thermally stable than metal-containing precursor(s) of the precursors used to form the modified precursor(s). The outlets are coupled with the reaction chamber and the pre-reaction region. The outlets separately provide the modified precursor(s) and the chalcogen precursor(s) to the reaction chamber. The modified precursor(s) and the chalcogen precursor(s) react and form a chalcogen film on the substrate in the reaction chamber.

Abstract: Field effect transistors and method of making. The field effect transistor includes a pair of active regions over a channel layer, a channel region formed in the channel layer and located between the pair of active regions, and a pair of contact via structures electrically connected to the pair of active regions. The contact via structure is formed in an interlayer dielectric layer that extends over the channel layer.

Abstract: An image encoder includes a tone mapper, an enhancement layer and an image file generator. The tone mapper is used to generate a base image according to an enhanced image and red green blue (RGB) gains. The RGB gains are set close to or the same as each other. The enhancement layer is used to generate a tone curve and/or a gain map of the base image and the enhanced image according to the tone mapper and/or a group including the base image and the enhanced image. The image file generator is used to generate an image file according to the base image and at least one member of a group including the tone curve and the gain map.

Abstract: A display apparatus includes a driving backplane, a plurality of light emitting components, a first bank layer and a plurality of scattering particles. The first bank layer is disposed on the driving backplane. The first bank layer has a plurality of first openings and a plurality of oblique surfaces defining the first openings. The light emitting components respectively overlap with the first openings of the first bank layer. The scattering particles are disposed on a plurality of light emitting surfaces of the light emitting components. A plurality of air gaps exist between the scattering particles and the oblique surfaces of the first bank layer.

Abstract: A memory device including a base semiconductor die, conductive terminals, memory dies, an insulating encapsulation and a buffer cap is provided. The conductive terminals are disposed on a first surface of the base semiconductor die. The memory dies are stacked over a second surface of the base semiconductor die, and the second surface of the base semiconductor die is opposite to the first surface of the base semiconductor die. The insulating encapsulation is disposed on the second surface of the base semiconductor die and laterally encapsulates the memory dies. The buffer cap covers the first surface of the base semiconductor die, sidewalls of the base semiconductor die and sidewalls of the insulating encapsulation. A package structure including the above-mentioned memory device is also provided.

Abstract: The invention provides a light source optimization apparatus including a storage apparatus and a processor. The storage apparatus stores a plurality of modules. The processor is coupled to the storage apparatus and configured to execute the plurality of modules. The plurality of modules include a critical pattern module and a light source optimization module. The critical pattern module retrieves critical pattern data. The light source optimization module executes an ant colony optimization (ACO) algorithm according to a preset parameter to adjust an initial light source image to generate an output light source image, and the initial light source image corresponds to the critical pattern data.

Abstract: A method of manufacturing a semiconductor device includes forming a gate trench over a semiconductor substrate, depositing a gate dielectric layer and a work function layer in the gate trench, depositing a capping layer over the work function layer, passivating a surface portion of the capping layer to form a passivation layer, removing the passivation layer, depositing a fill layer in the gate trench, recessing the fill layer and the capping layer, and forming a contact metal layer above the capping layer in the gate trench.

Abstract: A frequency modulation feedback system applied to an actuation device composed of a carrier and a drive unit for driving the carrier. The frequency modulation feedback system includes: a feedback device for reading a feedback signal of the carrier and transmitting the feedback signal; a control section for receiving and reading the feedback signal to drive the drive unit; a passage, the feedback signal being transmitted from the feedback device via the passage to the control section; and a modulation device for modulating the waveform of the transmitted feedback signal. After the feedback device reads the feedback signal, the feedback device first transmits the feedback signal to the modulation device for the modulation device to change the waveform of the feedback signal. Then the feedback signal is transmitted via the passage to the control section for reading.