Patents by Inventor Yuming Tao

Yuming Tao has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230124251
    Abstract: The device may include a core. The device may include built-up layers arranged over the core. The device may also include a ground path disposed in a first built-up layer of the built-up layers. The device may also include a power path disposed in a second built-up layer of the built-up layers. The device may also include a multi-terminal capacitor on a top layer of the built-up layers. The multi-terminal capacitor may be coupled to the ground path and the power path through respective vias passing through the built-up layers. The respective vias may be arranged to alternate such that respective vias coupled to the power path neighbor a respective via coupled to the ground path.
    Type: Application
    Filed: October 18, 2022
    Publication date: April 20, 2023
    Inventor: Yuming Tao
  • Patent number: 9893701
    Abstract: A power filter circuit is provided for use in a package substrate for integrated circuits. A first power isolation circuit, having a first inductance, is configured to isolate power provided to one or more die connectors for provision to an integrated circuit die. A second power isolation circuit, having a second inductance, is configured to isolate power provided to one or more printed circuit board (PCB) connectors for provision to a PCB. A power plane electrically connects a first end of the first power isolation circuit to a first end of the second power isolation circuit, forming a “?” power filtering structure in some embodiments. A de-coupling capacitor can be provided as a surface-mount capacitor, or as an embedded capacitor in a core layer of an integrated circuit package.
    Type: Grant
    Filed: May 8, 2015
    Date of Patent: February 13, 2018
    Assignee: Microsemi Solutions (U.S.), Inc.
    Inventors: John Plasterer, Yuming Tao
  • Patent number: 7848402
    Abstract: Methods and circuits are provided for producing phase-adjusted pre-emphasis and equalization. In applications in which little or no phase distortion occurs during signal transmission, propagation, or reception, linear-phase pre-emphasis or equalization can be used to reduce or eliminate phase distortion introduced by the pre-emphasis or equalization. Linear phase, constant group delay FIR filters or circuits may have odd numbers of coefficients symmetrical about the middle coefficient. In applications in which signal phase distortion occurs, linear phase or non-linear phase pre-emphasis or equalization can be used to reduce or compensate for the phase distortion. Phase compensation may be effected using FIR pre-emphasis and equalization filters and circuits. Non-linear phase FIR filters may have different numbers and combinations of coefficients.
    Type: Grant
    Filed: September 29, 2005
    Date of Patent: December 7, 2010
    Assignee: Altera Corporation
    Inventors: Shoujun Wang, Yuming Tao, Tad Kwasniewski, William Bereza
  • Patent number: 7693691
    Abstract: Systems and methods for accurately and quickly simulating link performance of a transceiver operating with any given transmission medium are provided. Accurate and quick link simulations may be provided using a link simulation platform. The link simulation platform may simulate link performance using transceiver behavioral models (e.g., transmitter and receiver behavioral models) that incorporate silicon level parameters, which parameters enable the behavioral models to substantially emulate the actual behavior of the transceiver portions of the link.
    Type: Grant
    Filed: September 19, 2006
    Date of Patent: April 6, 2010
    Assignee: Altera Corporation
    Inventors: Yuming Tao, William W. Bereza, Rakesh H. Patel, Tad Kwasniewski, Sergey Shumarayev, Shoujun Wang, Miao Li
  • Patent number: 7598779
    Abstract: A dual-mode LVDS/CML transmitter allows a single circuit to operate as either an LVDS transmitter or a CML transmitter. The transmitter mode can be switched by activating or deactivating appropriate circuit elements, and changing the voltage or current produced by appropriate sources or sinks. This flexibility allows a single transmitter to operate well in both AC and DC coupling conditions, and facilitates interoperation with a greater variety of receivers.
    Type: Grant
    Filed: October 8, 2004
    Date of Patent: October 6, 2009
    Assignee: Altera Corporation
    Inventors: Shoujun Wang, Yuming Tao, William Bereza, Tad Kwasniewski
  • Patent number: 7514789
    Abstract: A package-board co-design methodology preserves the signal integrity of high-speed signals passing from semiconductor packages to application PCBs. An optimal architecture of interconnects between package and PCB enhances the signal propagation, minimizes parasitic levels, and decreases electromagnetic interference from adjacent high frequency signals. The invention results in devices with superior signal quality and EMI shielding properties with enhanced capability for carrying data stream at multiple-gigabit per second bit-rates.
    Type: Grant
    Filed: June 26, 2008
    Date of Patent: April 7, 2009
    Assignee: Altera Corporation
    Inventors: Yuming Tao, Jon M. Long, Anilkumar Raman Pannikkat
  • Patent number: 7405477
    Abstract: A package-board co-design methodology preserves the signal integrity of high-speed signals passing from semiconductor packages to application PCBs. An optimal architecture of interconnects between package and PCB enhances the signal propagation, minimizes parasitic levels, and decreases electromagnetic interference from adjacent high frequency signals. The invention results in devices with superior signal quality and EMI shielding properties with enhanced capability for carrying data stream at multiple-gigabit per second bit-rates.
    Type: Grant
    Filed: December 1, 2005
    Date of Patent: July 29, 2008
    Assignee: Altera Corporation
    Inventors: Yuming Tao, Jon M. Long, Anilkumar Raman Pannikkat
  • Patent number: 6870273
    Abstract: Gridded I/O pads for flip-chip packages in which a coaxial-like solder bump pad configuration is used in which the I/O pads closest to the signal or bump pad are power or ground pads. The ground pads surrounding the signal pad form a coaxial-like pad configuration for impedance matching at the transition from die to package substrate. The ground pads surrounding the signal pad may be connected by a metal trace to form a ground pad ring. The invention employs conductor-backed ground coplanar waveguides (GCPW), which match impedance at connections between I/O cells and signal pads to enhance signal transmission, avoid reflection and leakage, and provide superior electromagnetic shielding. The present invention also supports high quantities of I/Os for a given die size, and supports flexible power and ground placement.
    Type: Grant
    Filed: April 29, 2003
    Date of Patent: March 22, 2005
    Assignee: PMC-Sierra, Inc.
    Inventors: Yuming Tao, Vernon R. Little
  • Publication number: 20040026794
    Abstract: Gridded I/O pads for flip-chip packages in which a coaxial-like solder bump pad configuration is used in which the I/O pads closest to the signal or bump pad are power or ground pads. The ground pads surrounding the signal pad form a coaxial-like pad configuration for impedance matching at the transition from die to package substrate. The ground pads surrounding the signal pad may be connected by a metal trace to form a ground pad ring. The invention employs conductor-backed ground coplanar waveguides (GCPW), which match impedance at connections between I/O cells and signal pads to enhance signal transmission, avoid reflection and leakage, and provide superior electromagnetic shielding. The present invention also supports high quantities of I/Os for a given die size, and supports flexible power and ground placement.
    Type: Application
    Filed: April 29, 2003
    Publication date: February 12, 2004
    Inventors: Yuming Tao, Vernon R. Little