Abstract: Disclosed is a traffic flow forecasting method based on a multi-mode dynamic residual graph convolution network, including following steps: constructing a relationship matrix and an adaptive matrix to learn the site dependence relationship for historical traffic data of traffic stations; using multi-mode dynamic graph convolution to extract traffic characteristics corresponding to different traffic modes; embedding the graph convolution into the gated cyclic neural network to realize the combination of space dependence and time dependence of traffic flow; connecting the network by using the dynamic residual, and combining the input traffic data with the decoding data to obtain the final forecasting value. The application utilizes two different methods to construct adjacency matrix, effectively captures traffic flow characteristics corresponding to different traffic modes, and dynamically fuses traffic flow characteristics of two different modes.

Abstract: A package on package (PoP) package structure is disclosed, the structure includes at least two layers of carrier boards that are packaged and stacked in sequence, wherein chips are arranged on the bottom side of the carrier boards, a heat sink is arranged on the bottom side of a carrier board other than a layer-1 carrier board, a pad welded to a system board is arranged on the bottom side of the layer-1 carrier board, and a chip on a carrier board other than a top-layer carrier board is surface-mounted onto the heat sink adjacent to the chip. The heat sink increases the heat dissipation area of the chip, enhances the heat dissipation capabilities of the PoP stacked packages massively, breaks the bottleneck of the high-density integration and miniaturization of the PoP stacked packages, and enhances the packaging density of the PoP stacked packages.

Abstract: A package on package (PoP) package structure is disclosed, the structure includes at least two layers of carrier boards that are packaged and stacked in sequence, wherein chips are arranged on the bottom side of the carrier boards, a heat sink is arranged on the bottom side of a carrier board other than a layer-1 carrier board, a pad welded to a system board is arranged on the bottom side of the layer-1 carrier board, and a chip on a carrier board other than a top-layer carrier board is surface-mounted onto the heat sink adjacent to the chip. The heat sink increases the heat dissipation area of the chip, enhances the heat dissipation capabilities of the PoP stacked packages massively, breaks the bottleneck of the high-density integration and miniaturization of the PoP stacked packages, and enhances the packaging density of the PoP stacked packages.