Patents by Inventor Yun-An Yeh
Yun-An Yeh has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 8717365Abstract: Data is received that describes a polyline having a first endpoint, a second endpoint, and a plurality of intermediate vertices, each of the intermediate vertices lying between the first endpoint and the second endpoint. An estimation line segment is drawn between the first endpoint and the second endpoint. An intermediate vertex is identifies as a pivot vertex from the plurality of intermediate vertices that is a greatest distance from the estimation line segment. A flatness ratio is calculated by dividing a distance of the pivot vertex from the estimation line segment by a length of the estimation line segment In a computer, the flatness ratio is compared to a predetermined threshold value. If the flatness ratio does not exceed the predetermined threshold value, the intermediate vertices are discarded, thereby modifying the polyline.Type: GrantFiled: August 9, 2010Date of Patent: May 6, 2014Assignee: Verizon Patent and Licensing Inc.Inventor: Ching-Yun Yeh
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Patent number: 8509116Abstract: A computer-implemented method receives a list of polygonal vertices associated with multiple polygons located in proximity to one another in a two-dimensional region and analyzes the polygonal vertices. The method automatically generates, based on the analysis, a polygonal hull that encloses the multiple polygons such that a line segment connecting any two polygonal vertices of the multiple polygons falls completely inside the generated polygonal hull. The multiple polygons may correspond to a two-dimensional geographic region. The computer-implemented method may be used for geographic regional segmentation.Type: GrantFiled: August 26, 2010Date of Patent: August 13, 2013Assignee: Verizon Patent and Licensing, Inc.Inventors: Ching-Yun Yeh, Robert Funk, Kumar Annamraju
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Patent number: 8284698Abstract: A computer-implemented method receives a set of data regarding a layout of a network, where the data specifies the interconnection of linear facilities and specifies at least one network point that is disconnected from the network. The computer-implemented method further determines a closest one of the linear facilities to the at least one network point based on the set of data and shifts the at least one network point to connect the at least one network point to the network based on a distance between a vertex associated with the closest one of the linear facilities and the at least one network point. The computer-implemented method also shifts the closest one of the linear facilities to connect the at least one network point in the network based on a distance associated with a linear projection from the at least one network point to the closest one of the linear facilities.Type: GrantFiled: June 9, 2008Date of Patent: October 9, 2012Assignee: Verizon Patent and Licensing Inc.Inventors: Ching-Yun Yeh, Robert Funk, Kumar Annamraju
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Publication number: 20120089333Abstract: A computer receives a set of Cartesian data and a set of geodetic data relating to a geographic area. A set of control points is generated, each control point being associated with a coordinate expressed in terms of latitude and longitude, and with a corresponding point in the Cartesian data. A plurality of sets of Cartesian coordinates is determined for each of the control points, each of the sets of Cartesian coordinates for one of the control points corresponding to a Cartesian system. A deviation is determined for a combination that includes a control point and a Cartesian system, the deviation being a difference between coordinates for the point in the Cartesian data and the set of Cartesian coordinates for the control point. For each set of Cartesian coordinates associated with the Cartesian system that is included in the combination, but further associated with a control point not in the combination, the set of Cartesian coordinates is modified according to the deviation.Type: ApplicationFiled: October 6, 2010Publication date: April 12, 2012Inventors: Ching-Yun Yeh, Kumar Annamraju, Anurag X. Singh, Nageswara R. Tanuku
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Publication number: 20120032962Abstract: Data is received that describes a polyline having a first endpoint, a second endpoint, and a plurality of intermediate vertices, each of the intermediate vertices lying between the first endpoint and the second endpoint. An estimation line segment is drawn between the first endpoint and the second endpoint. An intermediate vertex is identifies as a pivot vertex from the plurality of intermediate vertices that is a greatest distance from the estimation line segment. A flatness ratio is calculated by dividing a distance of the pivot vertex from the estimation line segment by a length of the estimation line segment In a computer, the flatness ratio is compared to a predetermined threshold value. If the flatness ratio does not exceed the predetermined threshold value, the intermediate vertices are discarded, thereby modifying the polyline.Type: ApplicationFiled: August 9, 2010Publication date: February 9, 2012Applicant: Verizon Patent and Licensing Inc.Inventor: Ching-Yun Yeh
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Publication number: 20100315977Abstract: A computer-implemented method receives a list of polygonal vertices associated with multiple polygons located in proximity to one another in a two-dimensional region and analyzes the polygonal vertices. The method automatically generates, based on the analysis, a polygonal hull that encloses the multiple polygons such that a line segment connecting any two polygonal vertices of the multiple polygons falls completely inside the generated polygonal hull. The multiple polygons may correspond to a two-dimensional geographic region. The computer-implemented method may be used for geographic regional segmentation.Type: ApplicationFiled: August 26, 2010Publication date: December 16, 2010Applicant: VERIZON PATENT AND LICENSING INC.Inventors: Ching-Yun YEH, Robert FUNK, Kumar ANNAMRAJU
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Patent number: 7813301Abstract: A computer-implemented method receives a list of polygonal vertices associated with multiple polygons located in proximity to one another in a two-dimensional region and analyzes the polygonal vertices. The method automatically generates, based on the analysis, a polygonal hull that encloses the multiple polygons such that a line segment connecting any two polygonal vertices of the multiple polygons falls completely inside the generated polygonal hull. The multiple polygons may correspond to a two-dimensional geographic region. The computer-implemented method may be used for geographic regional segmentation.Type: GrantFiled: May 8, 2008Date of Patent: October 12, 2010Assignee: Verizon Patent and Licensing Inc.Inventors: Ching-Yun Yeh, Robert Funk, Kumar Annamraju
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Publication number: 20090303903Abstract: A computer-implemented method receives a set of data regarding a layout of a network, where the data specifies the interconnection of linear facilities and specifies at least one network point that is disconnected from the network. The computer-implemented method further determines a closest one of the linear facilities to the at least one network point based on the set of data and shifts the at least one network point to connect the at least one network point to the network based on a distance between a vertex associated with the closest one of the linear facilities and the at least one network point. The computer-implemented method also shifts the closest one of the linear facilities to connect the at least one network point in the network based on a distance associated with a linear projection from the at least one network point to the closest one of the linear facilities.Type: ApplicationFiled: June 9, 2008Publication date: December 10, 2009Applicants: VERIZON DATA SERVICES LLC, VERIZON NORTH INC.Inventors: Ching-Yun Yeh, Robert Funk, Kumar Annamraju
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Publication number: 20090279453Abstract: A computer-implemented method receives a list of polygonal vertices associated with multiple polygons located in proximity to one another in a two-dimensional region and analyzes the polygonal vertices. The method automatically generates, based on the analysis, a polygonal hull that encloses the multiple polygons such that a line segment connecting any two polygonal vertices of the multiple polygons falls completely inside the generated polygonal hull. The multiple polygons may correspond to a two-dimensional geographic region. The computer-implemented method may be used for geographic regional segmentation.Type: ApplicationFiled: May 8, 2008Publication date: November 12, 2009Applicants: Verizon Data Services LLC, Verizon North Inc.Inventors: Ching-Yun YEH, Robert FUNK, Kumar ANNAMRAJU
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Patent number: 7356632Abstract: The present invention provides a data memory controller that supports for the invert of data bus. Data transmitted from a memory is received in a chip set, which further transmits the data to a data processing apparatus. While receiving the memory data, the chip set doubles the bandwidth and reduces the frequency, such that the time margin for processing data is increased. In addition, after outputting data to the data processing apparatus, a first frame of data is compared to bus idle state to further reduce frequency of data invert and power consumption.Type: GrantFiled: April 11, 2006Date of Patent: April 8, 2008Assignee: VIA Technologies, Inc.Inventors: Bi-Yun Yeh, Jiin Lai, Sheng-Chung Wu
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Patent number: 7325125Abstract: A method and computer system for accessing initialization data stored in a boot memory space. After the power supply starts up, the south bridge starts up and sends an initiating signal to the north bridge for starting up the north bridge. Once the north bridge has started up, it sends the south bridge a transaction which requests that the south bridge reads the initialization data from the memory space and sends the initialization data to the south bridge. Then, the CPU starts up and operates normally after the CPU receives an initiating signal and the initialization data sent by the north bridge.Type: GrantFiled: July 29, 2003Date of Patent: January 29, 2008Assignee: Via Technologies, Inc.Inventors: Bi-Yun Yeh, Shu-Tzu Wang, Heng-Chen Ho
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Publication number: 20060184757Abstract: The present invention provides a data memory controller that supports for the invert of data bus. Data transmitted from a memory is received in a chip set, which further transmits the data to a data processing apparatus. While receiving the memory data, the chip set doubles the bandwidth and reduces the frequency, such that the time margin for processing data is increased. In addition, after outputting data to the data processing apparatus, a first frame of data is compared to bus idle state to further reduce frequency of data invert and power consumption.Type: ApplicationFiled: April 11, 2006Publication date: August 17, 2006Inventors: Bi-Yun Yeh, Jiin Lai, Sheng-Chung Wu
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Patent number: 7082489Abstract: The present invention provides a data memory controller that supports for the invert of data bus. Data transmitted from a memory is received in a chip set, which further transmits the data to a data processing apparatus. While receiving the memory data, the chip set doubles the bandwidth and reduces the frequency, such that the time margin for processing data is increased. In addition, after outputting data to the data processing apparatus, a first frame of data is compared to bus idle state to further reduce frequency of data invert and power consumption.Type: GrantFiled: June 14, 2002Date of Patent: July 25, 2006Assignee: VIA Technologies, Inc.Inventors: Bi-Yun Yeh, Jiin Lai, Sheng-Chung Wu
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Publication number: 20050289304Abstract: A control chip for controlling and accessing an external memory module. The control chip comprises a terminal module and a decision unit. The terminal module is coupled to the external memory module through a memory bus for selectively matching the impedance of the memory bus. The decision unit is coupled to the terminal module and determines whether to turn on the terminal module according to a terminal signal, a dynamic select signal, and a read signal.Type: ApplicationFiled: March 11, 2005Publication date: December 29, 2005Inventor: Bi-Yun Yeh
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Publication number: 20040240206Abstract: A laser pointer with external power is disclosed, which comprises a laser generator, an interface for external-power connection, and a current limiting resistor. The laser generator is to generate laser beams. The interface for external-power connection is coupled to a power supply device for providing power to the laser generator. Besides, the power switch is to control whether the power should be conducted to the laser generator. Also, the current limiting resistor is connected between the laser generator and the interface for external-power connection to protect the laser generator from damage caused by the current-overload of the laser generator.Type: ApplicationFiled: September 29, 2003Publication date: December 2, 2004Inventor: Tzu-Yun Yeh
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Publication number: 20040059902Abstract: A method and computer system for accessing initialization data stored in a boot memory space. After the power supply starts up, the south bridge starts up and sends an initiating signal to the north bridge for starting up the north bridge. Once the north bridge has started up, it sends the south bridge a transaction which requests that the south bridge reads the initialization data from the memory space and sends the initialization data to the south bridge. Then, the CPU starts up and operates normally after the CPU receives an initiating signal and the initialization data sent by the north bridge.Type: ApplicationFiled: July 29, 2003Publication date: March 25, 2004Inventors: Bi-Yun Yeh, Shu-Tzu Wang, Heng-Chen Ho
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Patent number: 6691224Abstract: A method and computer system for accessing initialization data stored in a boot ROM's memory space which is not used by a BIOS contained in the boot ROM. After the power supply starts up, the south bridge starts up and sends an initiating signal to the north bridge for starting up the north bridge. Once the north bridge has started up, it sends the south bridge a transaction which requests that the south bridge reads the initialization data from the boot ROM and sends the initialization data to the south bridge. Then, the CPU starts up and operates normally after the CPU receives an initiating signal and the initialization data sent by the north bridge.Type: GrantFiled: January 12, 2000Date of Patent: February 10, 2004Assignee: Via Technologies, Inc.Inventors: Bi-Yun Yeh, Shu-Tzu Wang, Heng-Chen Ho
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Publication number: 20030041223Abstract: The present invention provides a data memory controller that supports for the invert of data bus. Data transmitted from a memory is received in a chip set, which further transmits the data to a data processing apparatus. While receiving the memory data, the chip set doubles the bandwidth and reduces the frequency, such that the time margin for processing data is increased. In addition, after outputting data to the data processing apparatus, a first frame of data is compared to bus idle state to further reduce frequency of data invert and power consumption.Type: ApplicationFiled: June 14, 2002Publication date: February 27, 2003Inventors: Bi-Yun Yeh, Jiin Lai, Sheng-Chung Wu