Patents by Inventor Yun-Chao YEH

Yun-Chao YEH has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20140262450
    Abstract: A multilayer printed circuit board structure is formed by stacking an aluminum foil substrate, a first pre-impregnated body, an aluminum foil middle layer, a second pre-impregnated body and a copper foil surface layer sequentially. Both the first pre-impregnated body and the second pre-impregnated body are composed by a fiber cloth impregnated with a heat conduction material in order that the heat conduction material can fill up the gaps of the fiber cloth. The heat conduction material is mixed from at least a resin and a filling material.
    Type: Application
    Filed: July 11, 2013
    Publication date: September 18, 2014
    Inventor: Yun-Chao YEH
  • Publication number: 20130251469
    Abstract: A double-sided metal drilling entry board for drilling comprises a metal bottom layer, a soft metal surface layer and a binding layer, in which the binding layer is disposed between the metal bottom layer and the soft metal surface layer to bind the metal bottom layer and the soft metal surface layer.
    Type: Application
    Filed: May 15, 2012
    Publication date: September 26, 2013
    Inventors: Yun-Chao YEH, Chung-Hao Chang, Han-Shiang Huag, Jia-Wei Cao
  • Publication number: 20110077337
    Abstract: A method for preparing a high thermal conductivity and low dissipation factor adhesive varnish for build-up (combining) additional insulation layers is disclosed, where the adhesive varnish is used for high-density interconnected printed circuit boards or package substrates.
    Type: Application
    Filed: September 25, 2009
    Publication date: March 31, 2011
    Inventors: Yun-Chao YEH, Chung-Hao CHANG, Cheng-Nan YEN, Li-Hung LIU
  • Publication number: 20110073798
    Abstract: A high thermal conductivity and low dissipation factor adhesive varnish for (build-up) combining additional insulation layers is disclosed to be used for high-density interconnected printed circuit boards or IC-package substrates and to be formed by well mixing an epoxy resin precursor, a bi-hardener mixture, a catalyst, a flow modifier, an inorganic filler with high thermal conductivity, and a solvent. The epoxy resin precursor is formed by mixing at least two epoxy resins with a certain ratio, where the at least two epoxy resins are selected from a group including a tri-functional epoxy resin, a rubber-modified or Dimmer-acid-modified epoxy resin, a bromide-contained epoxy resin, a halogen-free/phosphorus-contained epoxy resin, a halogen-free/phosphorus-free epoxy resin, a long-chain/halogen-free epoxy resin, and a bisphenol A (BPA) epoxy resin.
    Type: Application
    Filed: September 25, 2009
    Publication date: March 31, 2011
    Inventors: Yun-Chao YEH, Chung-Hao CHANG, Cheng-Nan YEN, Li-Hung LIU