Patents by Inventor Yun-Chieh Chen

Yun-Chieh Chen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20180165241
    Abstract: A channel switching device, a memory storage device and a channel switching method are provided. The channel switching device includes a signal analysis module and a switch module. The signal analysis module is configured to analyze non-power signal from at least one of a plurality of connection interface units of the memory storage device. The switch module is configured to turn on a first channel coupled to a first connection interface unit among the connection interface units of the memory storage device according to an analysis result of the non-power signal, where the first channel which is turned on is for receiving first input signal from the first connection interface unit or transmitting first output signal to the first connection interface unit. Therefore, a probability of mistakenly enabling or disabling a specific connection interface unit of a memory storage device can be reduced.
    Type: Application
    Filed: February 10, 2017
    Publication date: June 14, 2018
    Applicant: PHISON ELECTRONICS CORP.
    Inventors: Wei-Ting Wei, Wei-Yung Chen, Yun-Chieh Chen, Ta-Chuan Wei
  • Patent number: 9886071
    Abstract: A memory storage device having a rewritable non-volatile memory module, a first connection interface unit, a second connection interface unit, a power management circuit and a memory control circuit unit is provided. When an external power supply device is electrically connected to the second connection interface unit, the power management circuit receives a second power supply voltage from the external power supply device via the second connection interface unit, supplies an operation voltage to the rewritable non-volatile memory module and the memory control circuit unit and supplies the second power supply voltage to a host device. When the external power supply device is electrically disconnected with the second connection interface unit, the power management circuit receives a first power supply voltage from the host device via the first connection interface unit and supplies the operation voltage to the memory control circuit unit and the rewritable non-volatile memory module.
    Type: Grant
    Filed: July 15, 2016
    Date of Patent: February 6, 2018
    Assignee: PHISON ELECTRONICS CORP.
    Inventors: Zeh-Yang Chew, Shou-Chih Lee, Po-Chun Hsieh, Yun-Chieh Chen, I-Chung Tsai
  • Publication number: 20170329381
    Abstract: A memory storage device having a rewritable non-volatile memory module, a first connection interface unit, a second connection interface unit, a power management circuit and a memory control circuit unit is provided. When an external power supply device is electrically connected to the second connection interface unit, the power management circuit receives a second power supply voltage from the external power supply device via the second connection interface unit, supplies an operation voltage to the rewritable non-volatile memory module and the memory control circuit unit and supplies the second power supply voltage to a host device. When the external power supply device is electrically disconnected with the second connection interface unit, the power management circuit receives a first power supply voltage from the host device via the first connection interface unit and supplies the operation voltage to the memory control circuit unit and the rewritable non-volatile memory module.
    Type: Application
    Filed: July 15, 2016
    Publication date: November 16, 2017
    Inventors: Zeh-Yang Chew, Shou-Chih Lee, Po-Chun Hsieh, Yun-Chieh Chen, I-Chung Tsai
  • Patent number: 9317418
    Abstract: A non-volatile memory storage apparatus having a connector, an energy storage circuit, a power regulator and supply circuit, a non-volatile memory module, a memory controller and a buffer memory is provided. The power regulator and supply circuit is configured for transforming an output voltage from the energy storage circuit into a first voltage used for the non-volatile memory module and a second voltage used for the memory controller and the buffer memory. The memory controller is configured for writing data stored temporarily in the buffer memory into the non-volatile memory module with a special writing mode when receiving a detecting signal indicating that an input voltage is continuously smaller than a predetermined voltage for a predetermined period or receiving a detecting signal indicating that an inactive status of the connector or receiving a suspend mode signal, a warm reset signal or a hot reset signal from a host system.
    Type: Grant
    Filed: June 17, 2014
    Date of Patent: April 19, 2016
    Assignee: PHISON ELECTRONICS CORP.
    Inventors: Hsiang-Hsiung Yu, Ta-Chuan Wei, Yun-Chieh Chen, Yu-Chung Shen
  • Patent number: 9310869
    Abstract: A memory storage device, a memory control circuit unit and a power supply method are provided. The power supply method includes: providing a first power voltage to a host interface circuit of the memory storage device; providing a second power voltage to a memory management circuit of the memory storage device; providing a third power voltage to a memory interface circuit of the memory storage device, wherein a reference voltage terminal of the memory interface circuit is coupled to a power input terminal of the memory management circuit. Thus, the overheat problem of the memory storage device due to the voltage conversion may be improved.
    Type: Grant
    Filed: August 19, 2014
    Date of Patent: April 12, 2016
    Assignee: PHISON ELECTRONICS CORP.
    Inventors: Chih-Jen Hsu, Hsiang-Hsiung Yu, Ta-Chuan Wei, Yun-Chieh Chen
  • Patent number: 9281631
    Abstract: A connector suitable for a storage device is provided. The storage device has a storage module. The connector includes a body, a plurality of terminals, and a housing. The terminals are disposed in the body, and a first end of each terminal protrudes from the body and is electrically connected to the storage module. The housing covers the body and has an indentation and a shielding portion. The first end of each terminal is located at the indentation. The shielding portion shields the indentation, and the first end of each terminal is located between the shielding portion and the storage module. A storage device is also provided.
    Type: Grant
    Filed: May 19, 2014
    Date of Patent: March 8, 2016
    Assignee: PHISON ELECTRONICS CORP.
    Inventors: Wei-Hung Lin, Hsien-Sheng Tsao, Yun-Chieh Chen
  • Publication number: 20150323969
    Abstract: A memory storage device, a memory control circuit unit and a power supply method are provided. The power supply method includes: providing a first power voltage to a host interface circuit of the memory storage device; providing a second power voltage to a memory management circuit of the memory storage device; providing a third power voltage to a memory interface circuit of the memory storage device, wherein a reference voltage terminal of the memory interface circuit is coupled to a power input terminal of the memory management circuit. Thus, the overheat problem of the memory storage device due to the voltage conversion may be improved.
    Type: Application
    Filed: August 19, 2014
    Publication date: November 12, 2015
    Inventors: Chih-Jen Hsu, Hsiang-Hsiung Yu, Ta-Chuan Wei, Yun-Chieh Chen
  • Publication number: 20150305143
    Abstract: A multi-layer printed circuit board structure, a connector module and a memory storage device are provided. The multi-layer printed circuit board structure includes a first layout layer and a second layout layer. The first layout layer includes a shielding element and at least one pad. The shielding element provides the grounding voltage. The second layout layer is disposed corresponding to the first layout layer and includes at least one wire, and one end of each wire is coupled to one of the pads. A predefined proportion of the wire is covered by a projection plane of the shielding element projected on the second layout layer.
    Type: Application
    Filed: June 6, 2014
    Publication date: October 22, 2015
    Inventors: Yun-Chieh Chen, Shih-Kung Lin, Ta-Chuan Wei, Hsiang-Hsiung Yu
  • Patent number: 9155189
    Abstract: A multi-layer printed circuit board structure, a connector module and a memory storage device are provided. The multi-layer printed circuit board structure includes a first layout layer and a second layout layer. The first layout layer includes a shielding element and at least one pad. The shielding element provides the grounding voltage. The second layout layer is disposed corresponding to the first layout layer and includes at least one wire, and one end of each wire is coupled to one of the pads. A predefined proportion of the wire is covered by a projection plane of the shielding element projected on the second layout layer.
    Type: Grant
    Filed: June 6, 2014
    Date of Patent: October 6, 2015
    Assignee: PHISON ELECTRONICS CORP.
    Inventors: Yun-Chieh Chen, Shih-Kung Lin, Ta-Chuan Wei, Hsiang-Hsiung Yu
  • Publication number: 20150280378
    Abstract: A connector suitable for a storage device is provided. The storage device has a storage module. The connector includes a body, a plurality of terminals, and a housing. The terminals are disposed in the body, and a first end of each terminal protrudes from the body and is electrically connected to the storage module. The housing covers the body and has an indentation and a shielding portion. The first end of each terminal is located at the indentation. The shielding portion shields the indentation, and the first end of each terminal is located between the shielding portion and the storage module. A storage device is also provided.
    Type: Application
    Filed: May 19, 2014
    Publication date: October 1, 2015
    Applicant: PHISON ELECTRONICS CORP.
    Inventors: Wei-Hung Lin, Hsien-Sheng Tsao, Yun-Chieh Chen
  • Publication number: 20140297936
    Abstract: A non-volatile memory storage apparatus having a connector, an energy storage circuit, a power regulator and supply circuit, a non-volatile memory module, a memory controller and a buffer memory is provided. The power regulator and supply circuit is configured for transforming an output voltage from the energy storage circuit into a first voltage used for the non-volatile memory module and a second voltage used for the memory controller and the buffer memory. The memory controller is configured for writing data stored temporarily in the buffer memory into the non-volatile memory module with a special writing mode when receiving a detecting signal indicating that an input voltage is continuously smaller than a predetermined voltage for a predetermined period or receiving a detecting signal indicating that an inactive status of the connector or receiving a suspend mode signal, a warm reset signal or a hot reset signal from a host system.
    Type: Application
    Filed: June 17, 2014
    Publication date: October 2, 2014
    Inventors: Hsiang-Hsiung Yu, Ta-Chuan Wei, Yun-Chieh Chen, Yu-Chung Shen
  • Patent number: 8837248
    Abstract: A non-volatile memory storage apparatus having a connector, an energy storage circuit, a power regulator and supply circuit, a non-volatile memory module, a memory controller and a buffer memory is provided. The power regulator and supply circuit is configured for transforming an output voltage from the energy storage circuit into a first voltage used for the non-volatile memory module and a second voltage used for the memory controller and the buffer memory. The memory controller is configured for writing data stored temporarily in the buffer memory into the non-volatile memory module with a special writing mode when receiving a detecting signal indicating that an input voltage is continuously smaller than a predetermined voltage for a predetermined period or receiving a detecting signal indicating that an inactive status of the connector or receiving a suspend mode signal, a warm reset signal or a hot reset signal from a host system.
    Type: Grant
    Filed: February 21, 2013
    Date of Patent: September 16, 2014
    Assignee: Phison Electronics Corp.
    Inventors: Hsiang-Hsiung Yu, Ta-Chuan Wei, Yun-Chieh Chen, Yu-Chung Shen
  • Patent number: 8826461
    Abstract: A method and a system for protecting data, a storage device, and a storage device controller are provided. In the present method, when a host accesses data in the storage device, whether the host performs a play operation or a copy operation on the data is first determined. If the host performs the play operation on the data, the storage device continues to execute the play operation so as to allow the host to access the data. On the other hand, if the host performs the copy operation on the data, the storage device executes an interference procedure so as to prevent or retard the data from being copied into the host.
    Type: Grant
    Filed: November 20, 2009
    Date of Patent: September 2, 2014
    Assignee: Phison Electronics Corp.
    Inventors: Hsiang-Hsiung Yu, Yu-Chung Shen, Yun-Chieh Chen
  • Patent number: 8482128
    Abstract: A flash memory storage apparatus is provided. The flash memory storage apparatus includes a substrate, a control and storage circuit unit, a ground lead, at least a signal lead, and a power lead. The control and storage circuit unit, the power lead, the signal lead, and the ground lead are disposed on the substrate, in which the power lead, the signal lead, and the ground lead respectively electrically connect to the control and storage circuit unit. Moreover, the flash memory storage apparatus further includes an extra ground lead electrically connected to the ground lead or a protrusion on the substrate, such that the ground lead first electrically connects to a host when the flash memory storage apparatus is plugged into the host.
    Type: Grant
    Filed: May 24, 2012
    Date of Patent: July 9, 2013
    Assignee: Phison Electronics Corp.
    Inventors: Yu-Fong Lin, Hung-Yi Chung, Yu-Tong Lin, Yun-Chieh Chen
  • Patent number: 8416621
    Abstract: A non-volatile memory storage apparatus having a connector, an energy storage circuit, a power regulator and supply circuit, a non-volatile memory module, a memory controller and a buffer memory is provided. The power regulator and supply circuit is configured for transforming an output voltage from the energy storage circuit into a first voltage used for the non-volatile memory module and a second voltage used for the memory controller and the buffer memory. The memory controller is configured for writing data stored temporarily in the buffer memory into the non-volatile memory module with a special writing mode when receiving a detecting signal indicating that an input voltage is continuously smaller than a predetermined voltage for a predetermined period or receiving a detecting signal indicating that an inactive status of the connector or receiving a suspend mode signal, a warm reset signal or a hot reset signal from a host system.
    Type: Grant
    Filed: February 14, 2011
    Date of Patent: April 9, 2013
    Assignee: Phison Electronics Corp.
    Inventors: Hsiang-Hsiung Yu, Ta-Chuan Wei, Yun-Chieh Chen, Yu-Chung Shen
  • Publication number: 20120230102
    Abstract: A flash memory storage apparatus is provided. The flash memory storage apparatus includes a substrate, a control and storage circuit unit, a ground lead, at least a signal lead, and a power lead. The control and storage circuit unit, the power lead, the signal lead, and the ground lead are disposed on the substrate, in which the power lead, the signal lead, and the ground lead respectively electrically connect to the control and storage circuit unit. Moreover, the flash memory storage apparatus further includes an extra ground lead electrically connected to the ground lead or a protrusion on the substrate, such that the ground lead first electrically connects to a host when the flash memory storage apparatus is plugged into the host.
    Type: Application
    Filed: May 24, 2012
    Publication date: September 13, 2012
    Applicant: PHISON ELECTRONICS CORP.
    Inventors: Yu-Fong Lin, Hung-Yi Chung, Yu-Tong Lin, Yun-Chieh Chen
  • Patent number: 8222743
    Abstract: A flash memory storage apparatus is provided. The flash memory storage apparatus includes a substrate, a control and storage circuit unit, a ground lead, at least a signal lead, and a power lead. The control and storage circuit unit, the power lead, the signal lead, and the ground lead are disposed on the substrate, in which the power lead, the signal lead, and the ground lead respectively electrically connect to the control and storage circuit unit. Moreover, the flash memory storage apparatus further includes an extra ground lead electrically connected to the ground lead or a protrusion on the substrate, such that the ground lead first electrically connects to a host when the flash memory storage apparatus is plugged into the host.
    Type: Grant
    Filed: May 27, 2009
    Date of Patent: July 17, 2012
    Assignee: Phison Electronics Corp.
    Inventors: Yu-Fong Lin, Hung-Yi Chung, Yu-Tong Lin, Yun-Chieh Chen
  • Publication number: 20120089766
    Abstract: A non-volatile memory storage apparatus having a connector, an energy storage circuit, a power regulator and supply circuit, a non-volatile memory module, a memory controller and a buffer memory is provided. The power regulator and supply circuit is configured for transforming an output voltage from the energy storage circuit into a first voltage used for the non-volatile memory module and a second voltage used for the memory controller and the buffer memory. The memory controller is configured for writing data stored temporarily in the buffer memory into the non-volatile memory module with a special writing mode when receiving a detecting signal indicating that an input voltage is continuously smaller than a predetermined voltage for a predetermined period or receiving a detecting signal indicating that an inactive status of the connector or receiving a suspend mode signal, a warm reset signal or a hot reset signal from a host system.
    Type: Application
    Filed: February 14, 2011
    Publication date: April 12, 2012
    Applicant: PHISON ELECTRONICS CORP.
    Inventors: Hsiang-Hsiung Yu, Ta-Chuan Wei, Yun-Chieh Chen, Yu-Chung Shen
  • Patent number: 8085104
    Abstract: An oscillation circuit, a driving circuit thereof, and a driving method thereof are provided. The driving circuit generates a second enable signal according to an output signal of an oscillator and a first enable signal. The second enable signal is transmitted to the oscillator. When a number of waves of the output signal within a predetermined period is smaller than a predetermined value, the driving circuit adjusts a voltage level of the second enable signal. A voltage level of the first enable signal is equal to an enable voltage level. Through variations in voltage levels of the second enable signal, the oscillator is triggered to oscillate.
    Type: Grant
    Filed: July 10, 2009
    Date of Patent: December 27, 2011
    Assignee: Phison Electronics Corp.
    Inventors: Yu-Tong Lin, Yun-Chieh Chen
  • Publication number: 20110067118
    Abstract: A method and a system for protecting data, a storage device, and a storage device controller are provided. In the present method, when a host accesses data in the storage device, whether the host performs a play operation or a copy operation on the data is first determined. If the host performs the play operation on the data, the storage device continues to execute the play operation so as to allow the host to access the data. On the other hand, if the host performs the copy operation on the data, the storage device executes an interference procedure so as to prevent or retard the data from being copied into the host.
    Type: Application
    Filed: November 20, 2009
    Publication date: March 17, 2011
    Applicant: PHISON ELECTRONICS CORP.
    Inventors: Hsiang-Hsiung Yu, Yu-Chung Shen, Yun-Chieh Chen