Abstract: An optical transceiver module temperature control device includes a processor, a printed circuit board assembly, an optical transceiver module and a temperature adjustment element. The processor is configured to measure an ambient temperature. The printed circuit board assembly includes a first side and a second side. The first side is opposite to the second side. The optical transceiver module is disposed on the first side of the printed circuit board assembly. The temperature adjustment element is coupled to the processor and disposed on the second side of the printed circuit board assembly. The processor is configured to generate a temperature adjustment signal according to the ambient temperature and an operating temperature range. The temperature adjustment element is configured to perform heat exchange with the printed circuit board assembly according to the temperature adjustment signal to adjust a temperature of the optical transceiver module into the operating temperature range.

Abstract: A semiconductor device and a method of manufacturing the same are provided. The semiconductor device includes a first transistor, a first resistive random access memory (RRAM) resistor, and a second RRAM resistor. The first resistor includes a first resistive material layer, a first electrode shared by the second resistor, and a second electrode. The second resistor includes the first electrode, a second resistive material layer, and a third electrode. The first electrode is electrically coupled to the first transistor.

Abstract: A method of accessing an on-chip read only memory (ROM) includes dividing a frequency of a system clock by a specific divisor, in order to generate a ROM clock; combining a specific number of adjacent addresses into a combined address, wherein the specific number is determined according to the specific divisor; inserting a first stall signal into a real output data, wherein a length of the first stall signal is determined in order to meet a timing requirement for accessing the on-chip ROM; generating an output data of the on-chip ROM according to the combined address, wherein a width of the output data is extended by a specific multiple which is determined according to the specific number; and generating a first delay corresponding to the length of the first stall signal in the address.

Abstract: A method of accessing an on-chip read only memory (ROM) includes dividing a frequency of a system clock by a specific divisor, in order to generate a ROM clock; combining a specific number of adjacent addresses into a combined address, wherein the specific number is determined according to the specific divisor; inserting a first stall signal into a real output data, wherein a length of the first stall signal is determined in order to meet a timing requirement for accessing the on-chip ROM; generating an output data of the on-chip ROM according to the combined address, wherein a width of the output data is extended by a specific multiple which is determined according to the specific number; and generating a first delay corresponding to the length of the first stall signal in the address.

Abstract: A charging apparatus for laptop computer with multiple-batteries is used in a first battery unit and a second battery unit. The charging apparatus comprises a micro controller unit; a first charging switch unit electrically connected to the micro controller unit; a second charging switch unit electrically connected to the micro controller unit; and a charging unit electrically connected to the first charging switch unit and the second charging switch unit. The micro controller unit controls the charging unit charging the first battery unit and the second battery unit via controlling the first charging switch unit and the second charging switch unit. The charging apparatus charges multi-batteries simultaneously.

Abstract: A charging apparatus for laptop computer with multiple-batteries is used in a first battery unit and a second battery unit. The charging apparatus comprises a micro controller unit; a first charging switch unit electrically connected to the micro controller unit; a second charging switch unit electrically connected to the micro controller unit; and a charging unit electrically connected to the first charging switch unit and the second charging switch unit. The micro controller unit controls the charging unit charging the first battery unit and the second battery unit via controlling the first charging switch unit and the second charging switch unit. The charging apparatus charges multi-batteries simultaneously.