Patents by Inventor Yun-Chung YANG

Yun-Chung YANG has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Cache memory
    Patent number: 9632951
    Abstract: A cache memory includes a tag memory array and a data memory array. A control register records a reconfiguration status of at least one cache way, a start address of the tag memory array, and a start address of the data memory array. A memory controller is electrically connected to the tag memory array, the data memory array, and the control register. The memory controller controls a data access state of the tag memory array according to the mode byte and the tag base address. The memory controller controls a data access state of the data memory array according to the mode byte and the data base address. A selection module is electrically connected between the tag memory array, the data memory array, and the memory controller. The cache memory solves the problem of idle tag memory of the tag memory array.
    Type: Grant
    Filed: May 19, 2015
    Date of Patent: April 25, 2017
    Assignee: National Sun Yat-Sen University
    Inventors: Ing-Jer Huang, Chun-Hung Lai, Yun-Chung Yang
  • Cache Memory
    Publication number: 20160275020
    Abstract: A cache memory includes a tag memory array and a data memory array. A control register records a reconfiguration status of at least one cache way, a start address of the tag memory array, and a start address of the data memory array. A memory controller is electrically connected to the tag memory array, the data memory array, and the control register. The memory controller controls a data access state of the tag memory array according to the mode byte and the tag base address. The memory controller controls a data access state of the data memory array according to the mode byte and the data base address. A selection module is electrically connected between the tag memory array, the data memory array, and the memory controller. The cache memory solves the problem of idle tag memory of the tag memory array.
    Type: Application
    Filed: May 19, 2015
    Publication date: September 22, 2016
    Inventors: Ing-Jer HUANG, Chun-Hung LAI, Yun-Chung YANG