Abstract: An electronic device and an encryption method thereof are provided. The electronic device includes a control unit which encrypts an encryption key using an inherent key, and transmits the encrypted encryption key and a key index corresponding to the inherent key to a recording medium. Accordingly, encrypted content stored in a recording medium can be decrypted when an electronic device is malfunctioning or replaced with a new one.

Abstract: Provided is a method of booting an electronic device including a host central processing unit (CPU) and a security module. The method includes: the host CPU starting to boot a system by using boot information in response to a reset or power on event of the electronic device; and when an authentication start instruction is not received by the security module from the host CPU until a first predetermined period elapses after an occurrence of the reset or power on event of the electronic device, controlling an operation of the host CPU by the security module. According to the method, when the authentication start instruction is received before the first predetermined period elapses, the security module authenticates the boot information and controls the operation of the host CPU based on an authentication result. A method of authenticating a boot of the electronic device in the security module is also provided.

Abstract: A pulse generator of an ultra wideband (UWB) system includes: a plurality of delay cells for receiving pulses, delaying the received pulses for a predetermined time, and outputting the delayed pulses; and an edge combiner connected to output ends of the plurality of delay cells for receiving the delayed pulses from the plurality of delay cells, outputting fine pulses corresponding to the delayed time, and generating one impulse signal with the outputted fine pulses. The edge combiner includes a plurality of XOR gates for receiving a first delayed pulse and a second delayed pulse from an nth delay cell and an (n+1)th delay cell among the plurality of delay cells and generating fine pulses, respectively, and an OR gate for receiving a first fine pulse and a second fine pulse respectively output from a first XOR gate and a second XOR gate included in the plurality of XOR gates.

Abstract: A pulse generator is provided. The pulse generator includes: a time delayed pulse generation unit including a plurality of delay cells for receiving a first pulse having a first pulse width and outputting pulses delayed by a particular time delay value on the basis of one of a rising edge and a falling edge of the first pulse; an edge combiner configured to receive the plurality of time delayed pulses from the time delayed pulse generation unit and generate second pulses having a second pulse width; and a channel selector configured to regulate the number of outputs of the second pulses generated by the edge combiner.

Abstract: A washing machine that circulates wash water and, at the same time, generates bubbles in the wash water. The washing machine includes a machine body, a tub disposed in the machine body. a tub cover provided above the tub, a pump mounted below the tub, and a circulation unit, having one end coupled to the pump and the other end coupled to the tub cover, to circulate wash water from the pump to the tub. The circulation unit includes a first channel, a second channel communicating with the first channel, the second channel having a smaller sectional area than the first channel, and an air inlet port provided in the second channel to allow air to be introduced into the circulation unit therethrough.

Abstract: An error correction circuit, an error correction method, and a semiconductor memory device including the error correction circuit are provided. The error correction circuit includes a partial syndrome generator, first and second error position detectors, a coefficient calculator, and a determiner. The partial syndrome generator calculates at least two partial syndromes using coded data. The first error position detector calculates a first error position using a part of the partial syndromes. The coefficient calculator calculates coefficients of an error position equation using the at least two partial syndromes. The determiner determines an error type based on the coefficients. The second error position detector optionally calculates a second error position based on the error type.

Abstract: An error correction circuit, an error correction method, and a semiconductor memory device including the error correction circuit are provided. The error correction circuit includes a partial syndrome generator, first and second error position detectors, a coefficient calculator, and a determiner. The partial syndrome generator calculates at least two partial syndromes using coded data. The first error position detector calculates a first error position using a part of the partial syndromes. The coefficient calculator calculates coefficients of an error position equation using the at least two partial syndromes. The determiner determines an error type based on the coefficients. The second error position detector optionally calculates a second error position based on the error type.

Abstract: A gate driving circuit for driving a display apparatus is disclosed. The gate driving circuit properly generates gate voltages despite inconsistent transistor characteristics due to processing and environment by maintaining certain nodes in reliably high impedance states.

Abstract: An ultra wideband (UWB) communication modem includes an interface configured to transceive data in connection with a host device, a baseband processor configured to process, in a parallel manner, a baseband signal being transceived between the interface and a parallel/serial converter, the parallel/serial converter configured to combine a parallel signal into a serial signal and output the serial signal, and separate a serial signal into a parallel signal and output the parallel signal, a radio frequency (RF) processor configured to reduce a frequency of a received UWB signal and transmit the frequency-reduced signal to the parallel/serial converter, and increase a frequency of the serial signal received from the parallel/serial converter and transmit the frequency-increased signal to a directional antenna, and the directional antenna configured to transceive a wireless signal by forming a directional beam and control a direction of the directional beam.

Abstract: In a method of forming a layer, a titanium layer and a titanium nitride layer may be successively formed on a first wafer. By-products adhered to the inside of a chamber during the formation of the titanium nitride layer may be removed from the chamber. Processes of forming the titanium layer, forming the titanium nitride layer, and removing the by-products may be repeated relative to a second wafer.

Abstract: A flash memory device and a method of programming the same include a memory cell array, a pass/fail check circuit and a control logic circuit. The memory cell array includes multiple memory cells arranged in rows and columns. The pass/fail check circuit verifies whether data bits selected by a column address during a column scan operation have program data values. The control logic circuit detects fail data bits from the selected data bits and stores the column address in response to the verification result of the pass/fail check circuit. The control logic circuit also compares a number of the fail data bits with a reference value and controls generation of the column address according to the comparison result.

Abstract: Provided is a radio frequency (RF) amplifier. The RF amplifier includes an amplification circuit amplifying an RF signal, a bias voltage generation circuit supplying a bias voltage of the amplification circuit, and a first bias resistor connected between the amplification circuit ad the bias voltage generation circuit, and having a predetermined resistance allowing the bias voltage to be affected by the RF signal.

Abstract: Plasma processing equipment having a structure for preventing gap formation includes: a chamber inside which a plasma environment is formed; an upper electrode positioned at a upper position of the chamber; an electrostatic chuck positioned at a lower position of the electrostatic chuck, having a lower electrode and holding a wafer on a top surface thereof; a ring positioned at an outer side of the electrostatic chuck; and a gap prevention unit for isolating from the outside a space between the electrostatic chuck and the ring.

Abstract: An apparatus and method for controlling content are provided. A memory which stores storage medium information regarding a storage medium, and a main control unit which groups a plurality of contents in the storage medium into a plurality of groups, allocates a group nonce to each group, stores the group nonce in the storage medium, and if a move of at least one content item of the plurality of content items is requested, controls the move of the content item based on whether the storage medium information contains an identifier or a group nonce of a first target group including the requested content item.

Abstract: A low power consuming mixed mode power amplifier which includes: a low output amplifier circuit generating a power amplified result having high efficiency in a low output mode that is most frequently used; a high output amplifier circuit generating an amplified result having high linearity in a high output mode of a region consuming the most power; and an amplifier controller selectively activating the low and high output amplifier circuits according to a power level of an input signal. The high and low output amplifier circuits have a predetermined gain difference.

Abstract: A method of encrypting metadata that can be represented by a tree structure. The method involves generating an encryption key for a predetermined node of the metadata using a function that takes as input parameters an encryption key for an upper node of the predetermined node and information specifying the predetermined node, and encrypting data of the predetermined node using the generated encryption key.

Abstract: A sense amplifier circuit for a flash memory device is disclosed. The sense amplifier including a first transistor controlled by a first voltage applied via a selected bit line, and a second transistor controlled by a second voltage applied via an unselected bit line. The second transistor has a current driving capability lower than a current driving capability of the first transistor.

Abstract: Provided is a radio frequency (RF) amplifier. The RF amplifier includes an amplification circuit amplifying an RF signal, a bias voltage generation circuit supplying a bias voltage of the amplification circuit, and a first bias resistor connected between the amplification circuit ad the bias voltage generation circuit, and having a predetermined resistance allowing the bias voltage to be affected by the RF signal.

Abstract: An electronic device and an encryption method thereof are provided. The electronic device includes a control unit which encrypts an encryption key using an inherent key, and transmits the encrypted encryption key and a key index corresponding to the inherent key to a recording medium. Accordingly, encrypted content stored in a recording medium can be decrypted when an electronic device is malfunctioning or replaced with a new one.

Abstract: Plasma processing equipment having a structure for preventing gap formation includes: a chamber inside which a plasma environment is formed; an upper electrode positioned at a upper position of the chamber; an electrostatic chuck positioned at a lower position of the electrostatic chuck, having a lower electrode and holding a wafer on a top surface thereof; a ring positioned at an outer side of the electrostatic chuck; and a gap prevention unit for isolating from the outside a space between the electrostatic chuck and the ring.