Patents by Inventor Yun-ho Choy

Yun-ho Choy has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5075892
    Abstract: A parallel read circuit for testing high density memories is disclosed which reduces testing time by increasing the simultaneous testing data imputted. Individual data line sense amplifiers are arrayed in parallel with corresponding multiplexers to amplify respective data bits from respective output data lines for each of the plural cell array blocks; data line comparators are connected at a position downstream of the individual data line sense amplifiers to compare the amplified data from said sense amplifiers per each separate cell array block and form primarily compared data, these primarily compared data are sent to the pertinent one of the data buses and individual output buffers are connected at a position downstream of the data buses to buffer further the test output from the data line comparators during a test mode in order to locate the specific location of defective memory block.
    Type: Grant
    Filed: May 19, 1989
    Date of Patent: December 24, 1991
    Assignee: Samsung Electronics Co. Ltd.
    Inventor: Yun-ho Choy