Patents by Inventor Yun-Hsuan Yeh

Yun-Hsuan Yeh has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Driving circuit for gamma voltage generator and gamma voltage generator using the same
    Patent number: 11081034
    Abstract: The present invention provides a driving circuit for a gamma voltage generator of a source driver. The gamma voltage generator includes a resistor string having a plurality of tap nodes, among which a plurality of first tap nodes are respectively connected to a plurality of first buffers. The driving circuit includes a second buffer, a digital-to-analog converter (DAC) and a control circuit. The second buffer is connected to a second tap node other than the plurality of first tap nodes among the plurality of tap nodes. The DAC is coupled to the second buffer. The control circuit, coupled to the DAC, is configured to receive a plurality of first control signals for the plurality of first buffers and calculate a second control signal for the DAC according to the plurality of first control signals.
    Type: Grant
    Filed: March 25, 2020
    Date of Patent: August 3, 2021
    Assignee: NOVATEK Microelectronics Corp.
    Inventors: Yun-Hsuan Yeh, Tai-Yin Wu, Ying-Hsiang Wang, Yao-Hung Kuo
  • Driving circuit for gamma voltage generator and gamma voltage generator using the same
    Publication number: 20200380904
    Abstract: The present invention provides a driving circuit for a gamma voltage generator of a source driver. The gamma voltage generator includes a resistor string having a plurality of tap nodes, among which a plurality of first tap nodes are respectively connected to a plurality of first buffers. The driving circuit includes a second buffer, a digital-to-analog converter (DAC) and a control circuit. The second buffer is connected to a second tap node other than the plurality of first tap nodes among the plurality of tap nodes. The DAC is coupled to the second buffer. The control circuit, coupled to the DAC, is configured to receive a plurality of first control signals for the plurality of first buffers and calculate a second control signal for the DAC according to the plurality of first control signals.
    Type: Application
    Filed: March 25, 2020
    Publication date: December 3, 2020
    Inventors: Yun-Hsuan Yeh, Tai-Yin Wu, Ying-Hsiang Wang, Yao-Hung Kuo