Abstract: The present invention relates to a low temperature co-fired ceramic substrate with embedded capacitors. According to an embodiment of the present invention, the low temperature co-fired ceramic substrate with embedded capacitors is able to prevent diffusion, peeling or loss of electrodes after low temperature firing by controlling composition ratio of various metals included in the substrate, resulting in good adhesion between the ceramic substrate and the capacitor.

Abstract: Disclosed herein are a thin film electrode ceramic substrate and a method for manufacturing the same. The thin film electrode ceramic substrate includes: a ceramic substrate; one or more anti-etching metal layers formed in a surface of the ceramic substrate; thin film electrode pattern formed on the anti-etching metal layers; and a plating layer formed on the thin film electrode pattern, wherein respective edge portions of the thin film electrode pattern are contacted with the anti-etching metal layer, and thus, an undercut defect occurring between the surface of the ceramic substrate and the thin film electrode pattern and between the thin film electrode patterns due to an etchant can be prevented and the binding strength of the entire thin film electrode pattern can be enhanced, resulting in securing durability and reliability of the thin film electrode patterns.

Abstract: The present invention relates to a low temperature co-fired ceramic substrate with embedded capacitors. According to an embodiment of the present invention, the low temperature co-fired ceramic substrate with embedded capacitors is able to prevent diffusion, peeling or loss of electrodes after low temperature firing by controlling composition ratio of various metals included in the substrate, resulting in good adhesion between the ceramic substrate and the capacitor.

Abstract: A board for a probe card includes a ceramic board including a first insulating layer, and second insulating layers disposed on one surface of the first insulating layer and including cavities for receiving electronic components, conductive patterns disposed on the first and second insulating layers, conductive vias electrically connecting the conductive patterns, and a capacitor disposed in the cavities. The cavities have a depth greater than a thickness of the capacitor to secure a space in a lower portion of the cavity after receiving the capacitor.

Abstract: There is provided a Low Temperature Co-fired Ceramic (LTCC) composition, an LTCC substrate comprising the same, and a method of manufacturing the same. The LTCC composition includes 20 to 70 parts by weight of ceramic powder; and 30 to 80 parts by weight of glass component for low-temperature sintering, wherein the ceramic powder has plate-shaped ceramic powder particles and globular ceramic powder particles, and the ceramic powder has a content ratio of the globular ceramic powder particles with respect to the plate-shaped ceramic powder particles in a range of 0 to 1.

Abstract: Disclosed herein are a thin film electrode ceramic substrate and a method for manufacturing the same. The thin film electrode ceramic substrate includes: a ceramic substrate; a thin film electrode pattern formed on the ceramic substrate; and a plating layer formed on the thin film electrode pattern, wherein the plating layer is formed above the thin film electrode pattern and on both lateral surfaces of the thin film electrode pattern. According to the present invention, an undercut defect occurring between the surface of the ceramic substrate and the thin film electrode pattern and between the thin film electrode patterns due to an etchant can be prevented, by forming a plating layer above the thin film electrode pattern or on both lateral surfaces of the thin film electrode pattern, or forming an intaglio type anti-etching metal layer in the surface of the ceramic substrate.

Abstract: Disclosed herein are a thin film electrode ceramic substrate and a method for manufacturing the same. The thin film electrode ceramic substrate includes: a ceramic substrate; one or more anti-etching metal layers formed in a surface of the ceramic substrate; thin film electrode pattern formed on the anti-etching metal layers; and a plating layer formed on the thin film electrode pattern, wherein respective edge portions of the thin film electrode pattern are contacted with the anti-etching metal layer, and thus, an undercut defect occurring between the surface of the ceramic substrate and the thin film electrode pattern and between the thin film electrode patterns due to an etchant can be prevented and the binding strength of the entire thin film electrode pattern can be enhanced, resulting in securing durability and reliability of the thin film electrode patterns.

Abstract: Disclosed herein is a furnace, including: a body having a space formed therein; a plurality of thermocouples disposed in the body and vertically movably coupled with the body; a plurality of heating elements dispose in the body; and a control unit that receives temperature data from the thermocouples to control temperature of the heating elements, whereby the furnace can measure and control the temperature for each portion of the internal space to form uniform temperature distribution, in particular, make temperature distribution of the heat applied to the fired matter uniform to obtain high-quality fired matter.

Abstract: There is provided a method of manufacturing a ceramic substrate for a probe card and a ceramic substrate for a probe card. The method includes preparing a ceramic substrate having a via electrode provided therein; filling a void formed between the ceramic substrate and the via electrode with a filling material including thermosetting resin; and curing the filling material. Since the void formed between the ceramic substrate and the via electrode is removed, fixation strength between the via electrode and a probe tip can be increased and a defect such as a hollow at the periphery of the via electrode can be prevented.

Abstract: A ceramic firing furnace is provided. A uniform gas atmosphere is formed in the ceramic firing furnace to thus minimize a defective ceramic substrate when the ceramic substrate is fired. The ceramic firing furnace includes: a case having an internal space in which a shaped body is disposed; a heating element disposed in the interior of the case and radiating heat; and a plurality of air supply units fastened through the case such that the plurality of air supply units are rotatable by an external force, and supplying a gas to the internal space of the case.

Abstract: There is provided a Low Temperature Co-fired Ceramic (LTCC) composition, an LTCC substrate comprising the same, and a method of manufacturing the same. The LTCC composition includes 20 to 70 parts by weight of ceramic powder; and 30 to 80 parts by weight of glass component for low-temperature sintering, wherein the ceramic powder has plate-shaped ceramic powder particles and globular ceramic powder particles, and the ceramic powder has a content ratio of the globular ceramic powder particles with respect to the plate-shaped ceramic powder particles in a range of 0 to 1.

Abstract: There is provided an antenna module. The antenna module according to the present invention may include a patch antenna resonator formed on a surface of a dielectric substrate; and a surface wave-radiation resonator disposed to be separated from the patch antenna resonator, and formed to surround the patch antenna resonator so that signals from the patch antenna resonator are radiated. In this instance, the signals may flow on the surface of the dielectric substrate.

Abstract: There is provided a multilayer ceramic substrate including a conductive via of a dual-layer structure capable of preventing loss in electrical conductivity and signal. The multilayer ceramic substrate includes: a plurality of dielectric layers; and a circuit pattern part formed on at least a portion of the dielectric layers, the circuit pattern part including at least one conductive via and conductive pattern, wherein the at least one conductive via comprises an outer peripheral portion and an inner peripheral portion, the outer peripheral portion formed along an inner wall of a via hole extending through the dielectric layers and formed of a first conductive material containing a metal, and the inner peripheral portion filled in the outer peripheral portion and formed of a second conductive material having a shrinkage initiation temperature higher than a shrinkage initiation temperature of the first conductive material.

Abstract: In a semiconductor chip, a body has a top surface where a pattern is formed, an underside surface opposing the top surface and a plurality of side surfaces. A plurality of electrode pads are formed on the top surface of the body to connect to an external terminal. A shielding conductive film is formed on the surfaces excluding the top surface of the body where the pattern is formed. A conductive via is extended through the body to connect one of the electrode pads with the conductive film.

Abstract: A space transformer for a probe card includes: a multilayered circuit board having first and second faces which face each other and a plurality of side faces connecting the first and second faces; a plurality of channels including a first pad formed on the first face and receiving an electrical signal applied from the exterior, a second pad formed on the second face, to which a probe is connected, and a through wiring penetrating the multilayered circuit board and connecting the first and second pads; and side wirings formed on the side faces and connecting first and second pads of a damaged channel among a plurality of channels. When a portion of channels transferring an electrical signal to probes is damaged, the space transformer can repair the damaged channel by means of the side wirings.

Abstract: Provided is an electron chip module having a heat sink that can increase heat dissipation efficiency. A bottom surface of a module circuit board and an upper surface of a heat sink are in direct contact with each other by using a metal wire, such that heat generated during the operation of a heat-generating device chip mounted onto the module circuit board can be effectively dissipated to the outside.

Abstract: A semiconductor chip package includes a main board; a ceramic substrate having a cavity within which at least one chip is electrically mounted, the cavity being placed at a lower portion of the ceramic substrate facing the main board; and a conductive shielding layer provided with a predetermined thickness on the outside of the ceramic substrate. The ceramic substrate includes: at least one first ground line electrically connecting the conductive shielding layer with the main board; at least one second ground line electrically connecting the conductive shielding layer with the chip; and at least one signal line electrically connecting the chip with the main board. Thus, manufacturing costs are lowered because of the reduced number of components being used, miniaturization in device design can be achieved because of the small volume of the package, and the ground performance can be improved.

Abstract: A semiconductor chip package includes a main board; a ceramic substrate having a cavity within which at least one chip is electrically mounted, the cavity being placed at a lower portion of the ceramic substrate facing the main board; and a conductive shielding layer provided with a predetermined thickness on the outside of the ceramic substrate. The ceramic substrate includes: at least one first ground line electrically connecting the conductive shielding layer with the main board; at least one second ground line electrically connecting the conductive shielding layer with the chip; and at least one signal line electrically connecting the chip with the main board. Thus, manufacturing costs are lowered because of the reduced number of components being used, miniaturization in device design can be achieved because of the small volume of the package, and the ground performance can be improved.

Abstract: In a semiconductor chip, a body has a top surface where a pattern is formed, an underside surface opposing the top surface and a plurality of side surfaces. A plurality of electrode pads are formed on the top surface of the body to connect to an external terminal. A shielding conductive film is formed on the surfaces excluding the top surface of the body where the pattern is formed. A conductive via is extended through the body to connect one of the electrode pads with the conductive film.

Abstract: A semiconductor multichip package includes a substrate having a top surface on which a bonding pad is formed, and a bottom surface opposing the top surface, on which an external connection terminal electrically connected with the bonding pad is formed, a first semiconductor chip mounted on a region of the top surface of the substrate excluding the bonding pad, a ceramic spacer disposed on a top surface of the first semiconductor chip and including a passive device therein, and at least one second semiconductor chip disposed on a top surface of the ceramic spacer. The ceramic spacer includes an interlayer circuit for an electrical connection between the first and second semiconductor chips, and the passive device is electrically connected to at least one of the first and second semiconductor chips. Accordingly, a package with a more compact structure can be realized.