Patents by Inventor Yunhyeok Choi
Yunhyeok Choi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11924359Abstract: A security device generates a key based on a physically unclonable function (PUF). The security device includes a physically unclonable function (PUF) block, an integrity detector, and a post processor. The PUF block outputs a plurality of first random signals and a plurality of corresponding first inverted random signals each having a logic level opposite to that of each of the plurality of corresponding first random signals. The integrity detector determines data integrity of the plurality of first random signals by using the plurality of first random signals and the plurality of corresponding first inverted random signals. The post processor generates a first row key that includes validity signals satisfying the data integrity.Type: GrantFiled: October 25, 2022Date of Patent: March 5, 2024Assignee: Samsung Electronics Co., Ltd.Inventors: Kyoungmoon Ahn, Yongsoo Kim, Yongki Lee, Yunhyeok Choi, Bohdan Karpinskyy
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Publication number: 20230153069Abstract: A random number generator according to example embodiments includes an initial random number generator configured to generate an initial random number, a self-timed ring (STR) oscillator configured to receive the initial random number, the STR oscillator having a plurality of ring stages generating, in response to a clock, either a bubble that does not change an output state of a previous clock or a token changing the output state of the previous clock, a duty corrector configured to adjust a duty of each of output values of the ring stages, and a sampling circuit configured to sample a random number using a logic operation from the duty-corrected output values.Type: ApplicationFiled: September 14, 2022Publication date: May 18, 2023Inventors: Jieun Park, Yongki Lee, Sumin Noh, Yunhyeok Choi, Bohdan Karpinskyy
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Publication number: 20230052055Abstract: A security device generates a key based on a physically unclonable function (PUF). The security device includes a physically unclonable function (PUF) block, an integrity detector, and a post processor. The PUF block outputs a plurality of first random signals and a plurality of corresponding first inverted random signals each having a logic level opposite to that of each of the plurality of corresponding first random signals. The integrity detector determines data integrity of the plurality of first random signals by using the plurality of first random signals and the plurality of corresponding first inverted random signals. The post processor generates a first row key that includes validity signals satisfying the data integrity.Type: ApplicationFiled: October 25, 2022Publication date: February 16, 2023Inventors: KYOUNGMOON AHN, YONGSOO KIM, YONGKI LEE, YUNHYEOK CHOI, BOHDAN KARPINSKYY
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Publication number: 20230025153Abstract: A random number generating circuit includes: an oscillation circuit including a plurality of first delay elements connected to each other in series to generate an oscillation signal; a sampling circuit including a plurality of second delay elements connected to each other in series to generate a plurality of sampling signals by sampling the oscillation signal at a plurality of sampling points in time based on the plurality of second delay elements; and a random number determining circuit configured to generate a random number based on a target sampling point in time associated with a target sampling signal in which a first logic level transition occurs from among the plurality of sampling signals, wherein the plurality of sampling points includes the target sampling point.Type: ApplicationFiled: July 18, 2022Publication date: January 26, 2023Applicant: SAMSUNG ELECTRONICS CO., LTD.Inventors: Yunhyeok CHOI, Yongki LEE, Sumin NOH, Jieun PARK, Bohdan KARPINSKYY
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Patent number: 11516026Abstract: A security device generates a key based on a physically unclonable function (PUF). The security device includes a physically unclonable function (PUF) block, an integrity detector, and a post processor. The PUF block outputs a plurality of first random signals and a plurality of corresponding first inverted random signals each having a logic level opposite to that of each of the plurality of corresponding first random signals. The integrity detector determines data integrity of the plurality of first random signals by using the plurality of first random signals and the plurality of corresponding first inverted random signals. The post processor generates a first row key that includes validity signals satisfying the data integrity.Type: GrantFiled: September 8, 2020Date of Patent: November 29, 2022Assignee: Samsung Electronics Co., Ltd.Inventors: Kyoungmoon Ahn, Yongsoo Kim, Yongki Lee, Yunhyeok Choi, Bohdan Karpinskyy
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Patent number: 11368319Abstract: The present disclosure relates to an integrated circuit and a method of using the integrated circuit used to perform authentication using a challenge-response method. The challenge-response method includes an internal challenge generator, a physically unclonable function (PUF) block, and a response generator. The internal challenge generator is configured to receive a challenge, generate a plurality of internal challenges corresponding to the challenge, and generate at least one valid internal challenge among the plurality of internal challenges using screen information. The physically unclonable function (PUF) block is configured to generate a plurality of valid internal responses respectively changing according to the plurality of valid internal challenges. The response generator is configured to output a response generated using the plurality of valid internal responses.Type: GrantFiled: September 9, 2020Date of Patent: June 21, 2022Assignee: Samsung Electronics Co., Ltd.Inventors: Yongsoo Kim, Juyeon Lee, Mijung Noh, Yongki Lee, Yunhyeok Choi
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Patent number: 11277272Abstract: Systems and methods are described based on an integrated circuit that performs a challenge-response physically unclonable function (PUF). The PUF is used for challenge-response authentication. The integrated circuit includes a PUP block configured to output an n-bit internal response corresponding to a challenge that requests a response where n is an integer greater than 1 and a response generator configured to calculate a Hamming weight of the internal response and output the response by comparing the Hamming weight with at least one reference.Type: GrantFiled: September 11, 2019Date of Patent: March 15, 2022Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Yunhyeok Choi, Yongki Lee, Yongsoo Kim, Jieun Park, Bohdan Karpinskyy
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Publication number: 20210250189Abstract: A security device generates a key based on a physically unclonable function (PUF). The security device includes a physically unclonable function (PUF) block, an integrity detector, and a post processor. The PUF block outputs a plurality of first random signals and a plurality of corresponding first inverted random signals each having a logic level opposite to that of each of the plurality of corresponding first random signals. The integrity detector determines data integrity of the plurality of first random signals by using the plurality of first random signals and the plurality of corresponding first inverted random signals. The post processor generates a first row key that includes validity signals satisfying the data integrity.Type: ApplicationFiled: September 8, 2020Publication date: August 12, 2021Inventors: KYOUNGMOON AHN, YONGSOO KIM, YONGKI LEE, YUNHYEOK CHOI, BOHDAN KARPINSKYY
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Publication number: 20210234709Abstract: The present disclosure relates to an integrated circuit and a method of using the integrated circuit used to perform authentication using a challenge-response method. The challenge-response method includes an internal challenge generator, a physically unclonable function (PUF) block, and a response generator. The internal challenge generator is configured to receive a challenge, generate a plurality of internal challenges corresponding to the challenge, and generate at least one valid internal challenge among the plurality of internal challenges using screen information. The physically unclonable function (PUF) block is configured to generate a plurality of valid internal responses respectively changing according to the plurality of valid internal challenges. The response generator is configured to output a response generated using the plurality of valid internal responses.Type: ApplicationFiled: September 9, 2020Publication date: July 29, 2021Inventors: YONGSOO KIM, Juyeon Lee, Mijung Noh, Yongki Lee, Yunhyeok Choi
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Publication number: 20200145235Abstract: Systems and methods are described based on an integrated circuit that performs a challenge-response physically unclonable function (PUF). The PUF is used for challenge-response authentication. The integrated circuit includes a PUP block configured to output an n-bit internal response corresponding to a challenge that requests a response where n is an integer greater than 1 and a response generator configured to calculate a Hamming weight of the internal response and output the response by comparing the Hamming weight with at least one reference.Type: ApplicationFiled: September 11, 2019Publication date: May 7, 2020Inventors: Yunhyeok Choi, Yongki Lee, Yongsoo Kim, Jieun Park, Karpinskyy Bohdan
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Patent number: 10505728Abstract: A key enrollment method of a physically unclonable function (PUF) circuit including a plurality of PUF cells includes receiving a first level key from PUF cells, performing bit encoding on the first level key using a bit coding table based on Hamming weights of a plurality of bits in the first level key to generate a second level key, storing first helper data associated with the second level key in a non-volatile memory, performing block encoding on the second level key using an error correction code to generate a third level key, and storing second helper data associated with the third level key in the non-volatile memory.Type: GrantFiled: June 29, 2018Date of Patent: December 10, 2019Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Yong Ki Lee, Yongsoo Kim, Bohdan Karpinskyy, Yunhyeok Choi
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Patent number: 10476681Abstract: A semiconductor device includes a physical unclonable function (PUF) cell array that includes PUF cells outputting first bits; a non-volatile memory that stores marking bits indicating whether the first bits are valid, first mask bits generated by masking second bits depending on parity of the second bits, and second mask bits generated by masking helper bits of the second bits, the second bits are valid bits from the first bits; an extracting unit that extracts the second bits from the first bits using the marking bits; an unmasking unit that unmasks the second bits using the first mask bits while receiving the second bits to provide the third bits; a bit decoding unit that compresses the third bits to fourth bits while receiving the third bits; and a block decoding unit that generates a security key by decoding the fourth bits and the second mask bits.Type: GrantFiled: September 24, 2018Date of Patent: November 12, 2019Assignee: Samsung Electronics Co., Ltd.Inventors: Yongsoo Kim, Mijung Noh, Bohdan Karpinskyy, Kyoungmoon Ahn, Yong Ki Lee, Yunhyeok Choi
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Publication number: 20190116052Abstract: A semiconductor device includes a physical unclonable function (PUF) cell array that includes PUF cells outputting first bits; a non-volatile memory that stores marking bits indicating whether the first bits are valid, first mask bits generated by masking second bits depending on parity of the second bits, and second mask bits generated by masking helper bits of the second bits, the second bits are valid bits from the first bits; an extracting unit that extracts the second bits from the first bits using the marking bits; an unmasking unit that unmasks the second bits using the first mask bits while receiving the second bits to provide the third bits; a bit decoding unit that compresses the third bits to fourth bits while receiving the third bits; and a block decoding unit that generates a security key by decoding the fourth bits and the second mask bits.Type: ApplicationFiled: September 24, 2018Publication date: April 18, 2019Inventors: YONGSOO KIM, MIJUNG NOH, BOHDAN KARPINSKYY, KYOUNGMOON AHN, YONG KI LEE, YUNHYEOK CHOI
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Publication number: 20180323968Abstract: A key enrollment method of a physically unclonable function (PUF) circuit including a plurality of PUF cells includes receiving a first level key from PUF cells, performing bit encoding on the first level key using a bit coding table based on Hamming weights of a plurality of bits in the first level key to generate a second level key, storing first helper data associated with the second level key in a non-volatile memory, performing block encoding on the second level key using an error correction code to generate a third level key, and storing second helper data associated with the third level key in the non-volatile memory.Type: ApplicationFiled: June 29, 2018Publication date: November 8, 2018Inventors: Yong Ki Lee, Yongsoo Kim, Bohdan Karpinskyy, Yunhyeok Choi
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Patent number: 10101968Abstract: A random number generator may include a first meta-stable inverter having an input terminal and an output terminal connected to each other and configured to generate a meta-stable voltage, an amplifier configured to amplify the meta-stable voltage, control circuitry configured to adjust a threshold voltage of the meta-stable voltage, and a sampler configured to generate a random number based on sampling the meta-stable voltage. The random number generator may be configured to be operated according to different modes of operation of a plurality of modes of operation. The amplifier may be a second meta-stable inverter configured to amplify the meta-stable voltage or include an input terminal and an output terminal that are connected to each other based on the random number generator being operated according to a first mode of operation or a second mode of operation, respectively, of the plurality of modes of operation.Type: GrantFiled: June 27, 2017Date of Patent: October 16, 2018Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Sang-Wook Park, Bohdan Karpinskyy, Yong Ki Lee, Yunhyeok Choi, Mijung Noh
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Patent number: 10027480Abstract: A key enrollment method of a physically unclonable function (PUF) circuit including a plurality of PUF cells includes receiving a first level key from PUF cells, performing bit encoding on the first level key using a bit coding table based on Hamming weights of a plurality of bits in the first level key to generate a second level key, storing first helper data associated with the second level key in a non-volatile memory, performing block encoding on the second level key using an error correction code to generate a third level key, and storing second helper data associated with the third level key in the non-volatile memory.Type: GrantFiled: November 13, 2015Date of Patent: July 17, 2018Assignee: Samsung Electronics Co., Ltd.Inventors: Yong Ki Lee, Yongsoo Kim, Bohdan Karpinskyy, Yunhyeok Choi
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Publication number: 20180143806Abstract: A random number generator may include a first meta-stable inverter having an input terminal and an output terminal connected to each other and configured to generate a meta-stable voltage, an amplifier configured to amplify the meta-stable voltage, control circuitry configured to adjust a threshold voltage of the meta-stable voltage, and a sampler configured to generate a random number based on sampling the meta-stable voltage. The random number generator may be configured to be operated according to different modes of operation of a plurality of modes of operation. The amplifier may be a second meta-stable inverter configured to amplify the meta-stable voltage or include an input terminal and an output terminal that are connected to each other based on the random number generator being operated according to a first mode of operation or a second mode of operation, respectively, of the plurality of modes of operation.Type: ApplicationFiled: June 27, 2017Publication date: May 24, 2018Applicant: Samsung Electronics Co., Ltd.Inventors: Sang-Wook PARK, Bohdan KARPINSKYY, Yong Ki LEE, Yunhyeok CHOI, Mijung NOH
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Patent number: 9377997Abstract: A random number generator includes a first oscillator configured to output a first oscillating signal having a first frequency. A second oscillator is configured to output a second oscillating signal having a second frequency different from the first frequency. A sampling unit is configured to receive the first and second oscillating signals. The sampling unit is configured to generate at least one entropy source by combining the received first and second oscillating signals. The sampling unit is configured to generate a random bit corresponding to the generated entropy source using a third oscillating signal. A third oscillator & control unit is configured to control the first and second oscillators and to generate the third oscillating signal. A frequency of the third oscillating signal is lower than the first and second frequencies.Type: GrantFiled: January 6, 2014Date of Patent: June 28, 2016Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Ihor Vasyltsov, Bohdan Karpinskyy, Heonsoo Lee, Yunhyeok Choi
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Publication number: 20160156476Abstract: A key enrollment method of a physically unclonable function (PUF) circuit including a plurality of PUF cells includes receiving a first level key from PUF cells, performing bit encoding on the first level key using a bit coding table based on Hamming weights of a plurality of bits in the first level key to generate a second level key, storing first helper data associated with the second level key in a non-volatile memory, performing block encoding on the second level key using an error correction code to generate a third level key, and storing second helper data associated with the third level key in the non-volatile memory.Type: ApplicationFiled: November 13, 2015Publication date: June 2, 2016Inventors: Yong Ki Lee, Yongsoo Kim, Bohdan Karpinskyy, Yunhyeok Choi
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Publication number: 20140250160Abstract: A random number generator includes a first oscillator configured to output a first oscillating signal having a first frequency. A second oscillator is configured to output a second oscillating signal having a second frequency different from the first frequency. A sampling unit is configured to receive the first and second oscillating signals. The sampling unit is configured to generate at least one entropy source by combining the received first and second oscillating signals. The sampling unit is configured to generate a random bit corresponding to the generated entropy source using a third oscillating signal. A third oscillator & control unit is configured to control the first and second oscillators and to generate the third oscillating signal. A frequency of the third oscillating signal is lower than the first and second frequencies.Type: ApplicationFiled: January 6, 2014Publication date: September 4, 2014Applicant: SAMSUNG ELECTRONICS CO., LTD.Inventors: VASYLTSOV IHOR, Bohdan Karpinskyy, Heonsoo Lee, Yunhyeok Choi