Abstract: To dynamically manage a temperature of an electronic device, a local temperature is provided by measuring a temperature of a local spot in the electronic device and a reference temperature is provided by measuring a temperature of a reference spot in the electronic device where the reference spot and the local spot are thermally coupled. A target temperature corresponding to a limit value of the reference temperature is adjusted based on the local temperature and a power level of the electronic device is controlled based on the same target temperature. The target temperature may be set to a relatively high value to secure performance of the electronic device when the local temperature is relatively low. Alternatively, the target temperature may be set to a relatively low value to pursue stability of the electronic device when the local temperature is relatively high.

Abstract: A semiconductor package provided. The semiconductor package includes an interposer layer including a first surface and a second surface opposing each other, a first semiconductor chip and a second semiconductor chip on the first surface of the interposer layer, and a block copolymer film on the first semiconductor chip and the second semiconductor chip. The first semiconductor chip and the second semiconductor chip are different from each other. The block copolymer film includes a first pattern and a second pattern, which are different from each other, and one of the first pattern and the second pattern contains graphite.

Abstract: A semiconductor device package and a semiconductor apparatus are provided. The semiconductor device includes a first semiconductor package, a second semiconductor package, and an interposer between the first and second semiconductor packages. The first semiconductor package includes a first semiconductor package substrate and a first semiconductor chip. The second semiconductor package includes a second semiconductor package substrate and a second semiconductor chip. The interposer electrically connects the first semiconductor package to the second semiconductor package and includes a first interposer hole passing through the interposer. The first semiconductor chip includes a second portion which protrudes from a first portion, and the second portion is inserted into the first interposer hole.

Abstract: To dynamically manage a temperature of an electronic device, a local temperature is provided by measuring a temperature of a local spot in the electronic device and a reference temperature is provided by measuring a temperature of a reference spot in the electronic device where the reference spot and the local spot are thermally coupled. A target temperature corresponding to a limit value of the reference temperature is adjusted based on the local temperature and a power level of the electronic device is controlled based on the same target temperature. The target temperature may be set to a relatively high value to secure performance of the electronic device when the local temperature is relatively low. Alternatively, the target temperature may be set to a relatively low value to pursue stability of the electronic device when the local temperature is relatively high.

Abstract: The semiconductor package including a first semiconductor package including a first semiconductor package substrate, and a first semiconductor chip on the first semiconductor package substrate, an interposer disposed on the first semiconductor package is provided. Interposer electrically connects the first semiconductor package with an external semiconductor package, and has first and second sides opposed to each other. The second side is located between the first side and the first semiconductor package substrate, a first recess is formed in the second side of the interposer. The first recess has side walls extended from the second side toward the first side of the interposer and an upper surface connected to the side walls and the upper surface of the first recess faces the first semiconductor chip and a via in the interposer. The via does not transmit an electrical signal between the first semiconductor package and the external semiconductor package.

Abstract: To dynamically manage a temperature of an electronic device, a local temperature is provided by measuring a temperature of a local spot in the electronic device and a reference temperature is provided by measuring a temperature of a reference spot in the electronic device where the reference spot and the local spot are thermally coupled. A target temperature corresponding to a limit value of the reference temperature is adjusted based on the local temperature and a power level of the electronic device is controlled based on the same target temperature. The target temperature may be set to a relatively high value to secure performance of the electronic device when the local temperature is relatively low. Alternatively, the target temperature may be set to a relatively low value to pursue stability of the electronic device when the local temperature is relatively high.

Abstract: A semiconductor package provided. The semiconductor package includes an interposer layer including a first surface and a second surface opposing each other, a first semiconductor chip and a second semiconductor chip on the first surface of the interposer layer, and a block copolymer film on the first semiconductor chip and the second semiconductor chip. The first semiconductor chip and the second semiconductor chip are different from each other. The block copolymer film includes a first pattern and a second pattern, which are different from each other, and one of the first pattern and the second pattern contains graphite.

Abstract: A controller configured to: acquire a temperature of a first component and a temperature of a second component; and adjust a thermal resistance of a medium between the first component and the second component based on the acquired temperature of the first component, the acquired temperature of the second component, a first temperature limit of the first component, and a second temperature limit of the second component.

Abstract: The semiconductor package including a first semiconductor package including a first semiconductor package substrate, and a first semiconductor chip on the first semiconductor package substrate, an interposer disposed on the first semiconductor package is provided. Interposer electrically connects the first semiconductor package with an external semiconductor package, and has first and second sides opposed to each other. The second side is located between the first side and the first semiconductor package substrate, a first recess is formed in the second side of the interposer. The first recess has side walls extended from the second side toward the first side of the interposer and an upper surface connected to the side walls and the upper surface of the first recess faces the first semiconductor chip and a via in the interposer. The via does not transmit an electrical signal between the first semiconductor package and the external semiconductor package.

Abstract: The semiconductor package including a first semiconductor package including a first semiconductor package substrate, and a first semiconductor chip on the first semiconductor package substrate, an interposer disposed on the first semiconductor package is provided. Interposer electrically connects the first semiconductor package with an external semiconductor package, and has first and second sides opposed to each other. The second side is located between the first side and the first semiconductor package substrate, a first recess is formed in the second side of the interposer. The first recess has side walls extended from the second side toward the first side of the interposer and an upper surface connected to the side walls and the upper surface of the first recess faces the first semiconductor chip and a via in the interposer. The via does not transmit an electrical signal between the first semiconductor package and the external semiconductor package.

Abstract: A semiconductor device package and a semiconductor apparatus are provided. The semiconductor device includes a first semiconductor package, a second semiconductor package, and an interposer between the first and second semiconductor packages. The first semiconductor package includes a first semiconductor package substrate and a first semiconductor chip. The second semiconductor package includes a second semiconductor package substrate and a second semiconductor chip. The interposer electrically connects the first semiconductor package to the second semiconductor package and includes a first interposer hole passing through the interposer. The first semiconductor chip includes a second portion which protrudes from a first portion, and the second portion is inserted into the first interposer hole.

Abstract: The semiconductor package including a first semiconductor package including a first semiconductor package substrate, and a first semiconductor chip on the first semiconductor package substrate, an interposer disposed on the first semiconductor package is provided. Interposer electrically connects the first semiconductor package with an external semiconductor package, and has first and second sides opposed to each other. The second side is located between the first side and the first semiconductor package substrate, a first recess is formed in the second side of the interposer. The first recess has side walls extended from the second side toward the first side of the interposer and an upper surface connected to the side walls and the upper surface of the first recess faces the first semiconductor chip and a via in the interposer. The via does not transmit an electrical signal between the first semiconductor package and the external semiconductor package.

Abstract: A semiconductor device package includes a first semiconductor package, a second semiconductor package, and an interposer between the first and second semiconductor packages. The first semiconductor package includes a first semiconductor package substrate and a first semiconductor chip. The second semiconductor package includes a second semiconductor package substrate and a second semiconductor chip. The interposer electrically connects the first semiconductor package to the second semiconductor package and includes a first interposer hole passing through the interposer. The first semiconductor chip includes a second portion which protrudes from a first portion, and the first portion is inserted into the first interposer hole.

Abstract: To dynamically manage a temperature of an electronic device, a local temperature is provided by measuring a temperature of a local spot in the electronic device and a reference temperature is provided by measuring a temperature of a reference spot in the electronic device where the reference spot and the local spot are thermally coupled. A target temperature corresponding to a limit value of the reference temperature is adjusted based on the local temperature and a power level of the electronic device is controlled based on the same target temperature. The target temperature may be set to a relatively high value to secure performance of the electronic device when the local temperature is relatively low. Alternatively, the target temperature may be set to a relatively low value to pursue stability of the electronic device when the local temperature is relatively high.

Abstract: A controller configured to: acquire a temperature of a first component and a temperature of a second component; and adjust a thermal resistance of a medium between the first component and the second component based on the acquired temperature of the first component, the acquired temperature of the second component, a first temperature limit of the first component, and a second temperature limit of the second component.

Abstract: A semiconductor package and an electronic system including the same include a package board having an electric circuit pattern. A semiconductor chip is mounted on the package board and electrically connected with the circuit pattern of the package board. A non-contact temperature detector is provided with the semiconductor package and detects a temperature of an external heat source without making contact with the external heat source. A temperature controller controls the semiconductor chip according to the temperature of the external heat source that is detected by the non-contact temperature detector.

Abstract: A semiconductor package includes a package base substrate, at least one first semiconductor chip disposed on the package base substrate, and at least one stacked semiconductor chip structure disposed on the package base substrate adjacent to the at least one first semiconductor chip. The at least one stacked semiconductor chip includes a plurality of second semiconductor chips. A penetrating electrode region including a plurality of penetrating electrodes is disposed adjacent to an edge of the at least one stacked semiconductor chip structure.

Abstract: A method of predicting a temperature includes operatively coupling a temperature prediction circuit to a device including a semiconductor chip, determining a correlation between a current and voltage of the temperature prediction circuit, and predicting a temperature with respect to power applied to the device using the determined correlation.

Abstract: There is provided a semiconductor package including: a semiconductor chip; and an extension die provided on the semiconductor chip, wherein the semiconductor chip includes a heating point configured to generate a temperature greater than or equal to a pre-determined reference temperature in the semiconductor chip, the heating point provided in a center region of the extension die

Abstract: A semiconductor package includes a package base substrate, at least one first semiconductor chip disposed on the package base substrate, and at least one stacked semiconductor chip structure disposed on the package base substrate adjacent to the at least one first semiconductor chip. The at least one stacked semiconductor chip includes a plurality of second semiconductor chips. A penetrating electrode region including a plurality of penetrating electrodes is disposed adjacent to an edge of the at least one stacked semiconductor chip structure.