Patents by Inventor Yun Jeong MUN

Yun Jeong MUN has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240160574
    Abstract: A computer system may include a processor; a first memory device; a second memory device; a cache memory including a plurality of cache entries and a cache controller. The cache controller is configured to manage a source indicating whether a caching data is provided from the first memory device or the second memory device, and determine a cache entry to be evicted from the cache entries based on a cache miss ratio of request data by the source which the request data is read when the request data of the processor do not exist in the cache memory and a cache occupancy ratio by the source.
    Type: Application
    Filed: May 4, 2023
    Publication date: May 16, 2024
    Inventors: Yun Jeong MUN, Rak Kie KIM, Ho Kyoon LEE
  • Publication number: 20240130109
    Abstract: A semiconductor device includes: a semiconductor device, comprising: a bit line structure including a bit line contact plug, a bit line, and a bit line hard mask that are sequentially stacked over a substrate; a storage node contact plug that is spaced apart from the bit line structure; a conformal spacer that is positioned between the bit line and the storage node contact plug and includes a low-k material; and a seed liner that is positioned between the conformal spacer and the bit line and thinner than the conformal spacer.
    Type: Application
    Filed: December 15, 2023
    Publication date: April 18, 2024
    Inventors: Beom Ho MUN, Eun Jeong KIM, Jong Kook PARK, Seung Mi LEE, Ji Won CHOI, Kyoung Tak KIM, Yun Hyuck JI
  • Patent number: 11920025
    Abstract: Provided are a display device including a resin containing a repeating unit represented by chemical formula (1), a resin composition comprising the resin, and a pixel separation unit formed of the resin composition, in which the display device is a display device including a first electrode formed on a substrate, a pixel separation unit formed on the first electrode to partially expose the first electrode, and a second electrode installed to face the first electrode, and the pixel separation unit has an absorbance of 0.5/?m or more at a wavelength of 550 nm.
    Type: Grant
    Filed: October 1, 2021
    Date of Patent: March 5, 2024
    Assignee: DUK SAN NEOLUX CO., LTD.
    Inventors: Changmin Lee, Yun Jong Ko, Jun Bae, Jun Ki Kim, Hyunsang Cho, Seo Jeong Jeon, Soung Yun Mun
  • Publication number: 20220245066
    Abstract: A memory system includes a first memory device having a first memory that includes a plurality of access management regions and a first access latency, each of the access management regions including a plurality of pages, the first memory device configured to detect a hot access management region having an access count that reaches a preset value from the plurality of access management regions, and detect one or more hot pages included in the hot access management region; and a second memory device having a second access latency that is different from the first access latency of the first memory device. Data stored in the one or more hot pages is migrated to the second memory device.
    Type: Application
    Filed: April 22, 2022
    Publication date: August 4, 2022
    Inventors: Mi Seon HAN, Myoung Seo KIM, Yun Jeong MUN, Eui Cheol LIM
  • Patent number: 11379381
    Abstract: A main memory device includes a first memory device; and a second memory device having an access latency different from that of the first memory device. The first memory device determines, based on an access count for at least one region of the first memory device, a hot page included in the at least one region.
    Type: Grant
    Filed: October 4, 2019
    Date of Patent: July 5, 2022
    Assignee: SK hynix Inc.
    Inventors: Mi Seon Han, Yun Jeong Mun, Young Pyo Joo
  • Publication number: 20210318819
    Abstract: A data processing system includes a plurality of processors, a memory, a non-volatile memory, and a memory controller. The operational memory includes a first memory region and a second memory region. The memory controller performs a first swap operation of releasing assignment of a memory area assigned to a first processor within the first memory region, the first swap operation performed by moving data from the memory area to the second memory region. The memory controller performs a second swap operation by moving the data from the second memory region to the non-volatile memory when a second swap condition is satisfied after completion of the first swap operation.
    Type: Application
    Filed: September 1, 2020
    Publication date: October 14, 2021
    Inventors: Yun Jeong MUN, Eui Cheol LIM, Mi Seon HAN, Myoung Seo KIM
  • Publication number: 20210064535
    Abstract: A memory system includes a first memory device having a first memory that includes a plurality of access management regions and a first access latency, each of the access management regions including a plurality of pages, the first memory device configured to detect a hot access management region having an access count that reaches a preset value from the plurality of access management regions, and detect one or more hot pages included in the hot access management region; and a second memory device having a second access latency that is different from the first access latency of the first memory device. Data stored in the one or more hot pages is migrated to the second memory device.
    Type: Application
    Filed: April 3, 2020
    Publication date: March 4, 2021
    Inventors: Mi Seon HAN, Myoung Seo KIM, Yun Jeong MUN, Eui Cheol LIM
  • Publication number: 20200218668
    Abstract: A main memory device includes a first memory device; and a second memory device having an access latency different from that of the first memory device. The first memory device determines, based on an access count for at least one region of the first memory device, a hot page included in the at least one region.
    Type: Application
    Filed: October 4, 2019
    Publication date: July 9, 2020
    Inventors: Mi Seon HAN, Yun Jeong MUN, Young Pyo JOO