Patents by Inventor Yun-Ki Choi
Yun-Ki Choi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20220271045Abstract: A semiconductor device includes a substrate including a logic cell region and a connection region, a dummy transistor on the connection region, an intermediate connection layer on the dummy transistor, the intermediate connection layer including a connection pattern electrically connected to the dummy transistor, a first metal layer on the intermediate connection layer, an etch stop layer between the intermediate connection layer and the first metal layer, the etch stop layer covering a top surface of the connection pattern, and a penetration contact extended from the first metal layer toward a bottom surface of the substrate penetrating the connection region.Type: ApplicationFiled: September 14, 2021Publication date: August 25, 2022Applicant: Samsung Electronics Co., Ltd.Inventors: Shaofeng DING, Jeong Hoon AHN, Yun Ki CHOI
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Patent number: 11362380Abstract: A battery pack cooling system for an electric vehicle, which may be utilized during quick charging, includes a battery pack; a water-cooling device; a thermoelectric module installed at an coolant conduit of the water-cooling device; a current sensor configured to detect a magnitude of a charging current supplied to the battery pack; and a control unit configured to determine a charging C-rate based on the magnitude of the charging current and configured to operate the thermoelectric module when the charging C-rate is at a preset threshold or above. A method of cooling such a battery pack system for an electric vehicle is also provided.Type: GrantFiled: June 11, 2019Date of Patent: June 14, 2022Inventor: Yun-Ki Choi
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Publication number: 20220028827Abstract: A semiconductor device includes an interposer substrate and at least one die mounted on the interposer substrate. The interposer substrate includes a semiconductor substrate having a first surface and a second surface opposite to the first surface, an interlayer insulating layer on the first surface of the semiconductor substrate, a capacitor in a hole penetrating the interlayer insulating layer, an interconnection layer on the interlayer insulating layer, and a through-via extending from the interconnection layer toward the second surface of the semiconductor substrate in a vertical direction that is perpendicular to the first surface of the semiconductor substrate. The capacitor includes a sequential stack of a first electrode, a first dielectric layer, a second electrode, a second dielectric layer and a third electrode. A bottom of the hole is distal from the second surface of the semiconductor substrate in relation to the first surface of the semiconductor substrate.Type: ApplicationFiled: March 1, 2021Publication date: January 27, 2022Applicant: Samsung Electronics Co., Ltd.Inventors: Shaofeng DING, Jeong Hoon AHN, Yun Ki CHOI
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Patent number: 11133266Abstract: A method of fabricating a semiconductor device comprises forming first and second align keys in a wafer, the second align key apart from the first align key, forming third and fourth align keys in the wafer, the third align key apart from the second align key, the fourth align key apart from the third align key, forming a fifth align key in the wafer, the fifth align key apart from the fourth align key, forming a first line pattern in the wafer using the second and third align keys, forming a second line pattern in the wafer using the fourth and fifth align keys, forming a first interposer including the first line pattern by cutting a space between the first and second align keys, and forming a second interposer, the second interposer including the second line pattern by cutting a space between the third and fourth align keys.Type: GrantFiled: May 18, 2020Date of Patent: September 28, 2021Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Shaofeng Ding, Jeong Hoon Ahn, Yun Ki Choi
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Publication number: 20210242203Abstract: A semiconductor device includes a substrate including a logic cell region and a connection region, a dummy transistor on the connection region, an intermediate connection layer on the dummy transistor, a first metal layer on the intermediate connection layer, an etch stop layer between the intermediate connection layer and the first metal layer, a through contact below the first metal layer penetrating the connection region, an upper portion of the through contact protruding above the etch stop layer, and a protection insulating pattern on the etch stop layer covering the upper portion of the through contact. The protection insulating pattern covers an upper side surface of the through contact and a top surface of the through contact.Type: ApplicationFiled: September 28, 2020Publication date: August 5, 2021Applicant: Samsung Electronics Co., Ltd.Inventors: Shaofeng DING, Minguk KANG, Jihyung KIM, Jeong Hoon AHN, Haeri YOO, Yun Ki CHOI
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Publication number: 20210125937Abstract: A method of fabricating a semiconductor device comprises forming first and second align keys in a wafer, the second align key apart from the first align key, forming third and fourth align keys in the wafer, the third align key apart from the second align key, the fourth align key apart from the third align key, forming a fifth align key in the wafer, the fifth align key apart from the fourth align key, forming a first line pattern in the wafer using the second and third align keys, forming a second line pattern in the wafer using the fourth and fifth align keys, forming a first interposer including the first line pattern by cutting a space between the first and second align keys, and forming a second interposer, the second interposer including the second line pattern by cutting a space between the third and fourth align keys.Type: ApplicationFiled: May 18, 2020Publication date: April 29, 2021Applicant: Samsung Electronics Co., Ltd.Inventors: Shaofeng DING, Jeong Hoon AHN, Yun Ki CHOI
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INTERPOSER STRUCTURE, SEMICONDUCTOR PACKAGE COMPRISING THE SAME, AND METHOD FOR FABRICATING THE SAME
Publication number: 20210118794Abstract: Provided is an interposer structure. The interposer structure comprises an interposer substrate, an interlayer insulating film which covers a top surface of the interposer substrate, a capacitor structure in the interlayer insulating film and a wiring structure including a first wiring pattern and a second wiring pattern spaced apart from the first wiring pattern, on the interlayer insulating film, wherein the capacitor structure includes an upper electrode connected to the first wiring pattern, a lower electrode connected to the second wiring pattern, and a capacitor dielectric film between the upper electrode and the lower electrode.Type: ApplicationFiled: May 22, 2020Publication date: April 22, 2021Applicant: Samsung Electronics Co., Ltd.Inventors: Shaofeng DING, Jae June JANG, Jeong Hoon AHN, Yun Ki CHOI -
Publication number: 20210118696Abstract: The method of manufacturing an interposer includes providing a substrate including a first region and a second region adjacent to the first region, forming a first mold structure on the substrate, forming a photoresist layer on the first mold structure, forming a first transfer pattern over the photoresist layer on the first region, using a first photomask, forming a second transfer pattern over the photoresist layer on the second region, using the first photomask, forming a mask pattern on the first mold structure, using the first transfer pattern and the second transfer pattern and forming a first trench and a second trench in the first mold structure, using the mask pattern, the first trench being formed in the first region, and the second trench being formed in the second region.Type: ApplicationFiled: May 14, 2020Publication date: April 22, 2021Applicant: Samsung Electronics Co., Ltd.Inventors: Shaofeng DING, Jeong Hoon AHN, Yun Ki CHOI
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Patent number: 10892528Abstract: Disclosed is a battery module, which includes a battery cell assembly including a plurality of battery cells stacked on each other along a vertical direction, a heatsink configured to cover one side of the battery cell assembly, and a pair of cooling plates connected to the heatsink to cover both side surfaces of the battery cell assembly, respectively, the pair of cooling plates having a coolant channel formed along a stacking direction of the plurality of battery cells.Type: GrantFiled: September 1, 2016Date of Patent: January 12, 2021Assignee: LG CHEM, LTD.Inventors: Ha-Neul Yoo, Sang-Il Son, Hun Cha, Yun-Ki Choi, Jong-Soo Ha
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Publication number: 20200373634Abstract: A battery module includes: a module body including a cell assembly stack formed by stacking a plurality of cell assemblies and a module case configured to accommodate the cell assembly stack; and a pair of heatsinks disposed at an upper portion and a lower portion of the module body, respectively, to dissipate heat transferred from the module case. Each of the cell assemblies includes: at least one battery cell; a cartridge configured to accommodate the battery cell; and a pair of thermally conductive resin layers filled in respective empty spaces formed between a top end of the battery cell and the cartridge and between a bottom end of the battery cell and the cartridge.Type: ApplicationFiled: June 11, 2019Publication date: November 26, 2020Applicant: LG Chem, Ltd.Inventor: Yun-Ki Choi
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Patent number: 10804578Abstract: The present disclosure relates to a battery module, and a battery pack and a vehicle including the same. A battery module according to an embodiment of the present disclosure includes a cartridge including an accommodation space therein; a plurality of battery cells placed in the accommodation space; and a cooling unit configured to cool the battery cells, wherein the cooling unit includes: a cooling fin making surface contact with sides of the battery cells; a cooling plate placed below the cooling fin; and a connection member placed between the cooling fin and the cooling plate and transferring heat from the cooling fin to the cooling plate.Type: GrantFiled: January 16, 2017Date of Patent: October 13, 2020Assignee: LG Chem, Ltd.Inventors: Sang-Il Son, Ha-Neul Yoo, Yun-Ki Choi, Jong-Soo Ha
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Publication number: 20200295418Abstract: A battery pack cooling system for an electric vehicle, which may be utilized during quick charging, includes a battery pack; a water-cooling device; a thermoelectric module installed at an coolant conduit of the water-cooling device; a current sensor configured to detect a magnitude of a charging current supplied to the battery pack; and a control unit configured to determine a charging C-rate based on the magnitude of the charging current and configured to operate the thermoelectric module when the charging C-rate is at a preset threshold or above. A method of cooling such a battery pack system for an electric vehicle is also provided.Type: ApplicationFiled: June 11, 2019Publication date: September 17, 2020Applicant: LG Chem, Ltd.Inventor: Yun-Ki Choi
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Patent number: 10587018Abstract: Provided herein is a battery module that is capable of improving cooling efficiency despite a compact structure without using numerous members. The battery module according to the present disclosure includes a battery stack where batteries are stacked; and a battery management system, and includes a heat radiation paint coating layer that includes a heat radiation material in at least a portion of the constituting components.Type: GrantFiled: January 28, 2016Date of Patent: March 10, 2020Assignee: LG CHEM, LTD.Inventors: Yun-Ki Choi, Jong-Soo Ha, Sang-Il Son, Ha-Neul Yoo
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Patent number: 10510999Abstract: According to an aspect of the present disclosure, there is provided a cell cover for a secondary battery, which accommodates at least one secondary battery in an internal space and is mounted in a groove formed on a top surface of a cooling plate having an uneven plate shape, the cell cover including a first side plate and a second side plate facing each other to form opposite side surfaces of the internal space, a top plate forming a top surface of the internal space and connecting upper edges of the first side plate and the second side plate, and a first bottom plate extending from a lower edge of the first side plate and a second bottom plate extending from a lower edge of the second side plate to face the first bottom plate, the first bottom plate and the second bottom plate forming a bottom surface of the internal space, in which the first bottom plate and the second bottom plate are inclined downwardly at an angle with respect to a horizontal plane, respectively.Type: GrantFiled: June 14, 2016Date of Patent: December 17, 2019Assignee: LG CHEM, LTD.Inventors: Ha-Neul Yoo, Jong-Soo Ha, Sang-Il Son, Yun-Ki Choi, Hang-June Choi
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Publication number: 20190288357Abstract: According to an embodiment of the present disclosure, a battery module includes: a cartridge including an accommodation space therein; a plurality of battery cells placed in the accommodation space; a cooling unit configured to cool the battery cells; and a heat exchange unit configured to exchange heat with the cooling unit, wherein the heat exchange unit includes: a heat exchange chamber having an inner space; a lower cooling flow path located in the heat exchange chamber and through which a cooling fluid flows; an upper cooling flow path located above the lower cooling flow path and through which the cooling fluid supplied from the lower cooling flow path flows; and a connection flow path configured to supply the cooling fluid flowing in the lower cooling flow path to the upper cooling flow path.Type: ApplicationFiled: January 16, 2017Publication date: September 19, 2019Applicant: LG CHEM, LTD.Inventors: Sang-Il SON, Ha-Neul YOO, Yun-Ki CHOI, Jong-Soo HA
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Patent number: 10326185Abstract: A battery module including an array of cooling fins having different thicknesses is provided. The battery module includes: a plurality of battery units arranged in one direction; a plurality of cooling fins between adjacent battery units; and a heat sink coupled to ends of the plurality of cooling fins, wherein each cooling fin has a structure in which a pair of sub-cooling fins are face-to-face coupled to each other, and thicknesses of the plurality of cooling fins are reduced toward the side region from the central region due to a difference in a thickness of at least one of the pair of sub-cooling fins. Since heat is not accumulated at the central region, the battery module has uniform temperature distribution while being charged or discharged.Type: GrantFiled: September 21, 2016Date of Patent: June 18, 2019Assignee: LG CHEM, LTD.Inventors: Jung-Been You, Jung-Hang Lee, Bo-Hyon Kim, Hyun-Young Cho, Yun-Ki Choi, Jong-Soo Ha
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Publication number: 20190067760Abstract: The present disclosure relates to a battery module, and a battery pack and a vehicle including the same. A battery module according to an embodiment of the present disclosure includes a cartridge including an accommodation space therein; a plurality of battery cells placed in the accommodation space; and a cooling unit configured to cool the battery cells, wherein the cooling unit includes: a cooling fin making surface contact with sides of the battery cells; a cooling plate placed below the cooling fin; and a connection member placed between the cooling fin and the cooling plate and transferring heat from the cooling fin to the cooling plate.Type: ApplicationFiled: January 16, 2017Publication date: February 28, 2019Applicant: LG Chem, Ltd.Inventors: Sang-Il Son, Ha-Neul Yoo, Yun-Ki Choi, Jong-Soo Ha
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Publication number: 20180287226Abstract: Disclosed is a battery module, which includes a battery cell assembly including a plurality of battery cells stacked on each other along a vertical direction, a heatsink configured to cover one side of the battery cell assembly, and a pair of cooling plates connected to the heatsink to cover both side surfaces of the battery cell assembly, respectively, the pair of cooling plates having a coolant channel formed along a stacking direction of the plurality of battery cells.Type: ApplicationFiled: September 1, 2016Publication date: October 4, 2018Applicant: LG CHEM, LTD.Inventors: Ha-Neul YOO, Sang-Il SON, Hun CHA, Yun-Ki CHOI, Jong-Soo HA
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Publication number: 20180274112Abstract: Disclosed is a membrane electrode assembly that includes a polymer electrolyte membrane, a first electrochemical reaction layer formed on one side of the polymer electrolyte membrane to allow an oxidation reaction to occur thereon, a first electron-conductive layer formed between the polymer electrolyte membrane and the first electrochemical reaction layer, a second electrochemical reaction layer formed on a remaining side of the polymer electrolyte membrane to allow a reduction reaction to occur thereon, and a second electron-conductive layer formed between the polymer electrolyte membrane and the second electrochemical reaction layer. The first electron-conductive layer and the second electron-conductive layer include a porous metal.Type: ApplicationFiled: March 28, 2017Publication date: September 27, 2018Inventors: Sang Bong MOON, Yun Ki CHOI, Chang Hyun HAN, Su Hyun IM, Dae Jin YOON, Chang Hwan MOON
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Publication number: 20180277836Abstract: Disclosed is an electrode for high-current-density operation. The electrode includes a substrate 202, a first layer 204 which is positioned to be in contact with the substrate and which includes TiOx and an electronically conductive oxide, a second layer 206 which is positioned to be in contact with the first layer and which includes TiOx and an oxide having oxidation durability to an electrolyte, and a third layer 208 which is positioned to be in contact with the second layer and the electrolyte and which includes TiOx and an oxide oxidizing the electrolyte.Type: ApplicationFiled: March 29, 2017Publication date: September 27, 2018Applicant: Elchemtech Co., Ltd.Inventors: Sang Bong MOON, Yun Ki CHOI, Chang Hwan MOON, Hye Young JUNG, Nak Heon CHOI, Jun Young LEE, Kyoung Jun KIM, Min Ju PARK, Hyun Hee KIM