Patents by Inventor Yun RA
Yun RA has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240148836Abstract: In a method for treating a cancer expressing secreted protein acidic and rich in cysteine (SPARC), a composition including an albumin and at least one cysteine bound thereto is administered to a subject in need thereof. The cancer expressing the SPARC may be at least one selected from the group consisting of a brain tumor, melanoma, breast cancer, rectal cancer and stomach cancer.Type: ApplicationFiled: August 14, 2023Publication date: May 9, 2024Inventors: Keon Wook KANG, Myung Geun SONG, Cho Rong PARK, Yun-Sang LEE, Hye Won YOUN, Ji Yong PARK, Se Ra OH
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Publication number: 20240105616Abstract: Various embodiments generally relate to a power distribution network and a semiconductor device, which may include: a plurality of chip pads; a first distribution layer in which a plurality of first conductive lines having rectangular shapes of different sizes, respectively, are disposed; a second distribution layer in which a plurality of second conductive lines including a central cross-shaped conductive line and L-shaped conductive lines open toward respective corners of the second distribution layer are disposed; and a redistribution layer electrically coupling chip pads to which power is applied among the plurality of chip pads and the first conductive lines of the first distribution layer.Type: ApplicationFiled: December 26, 2022Publication date: March 28, 2024Inventors: Ki Bum KANG, Myeong Jin KIM, Jin Hyun KIM, Yun RA, Gyu Sun PARK, Sei Hyung JANG
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Publication number: 20240087457Abstract: A method of providing a parking service comprises calculating overlap degree of a target vehicle and specific parking area by analyzing a parking monitoring image obtained from a sensor for monitoring specific parking area at a first time of point and determining through the calculated overlap degree whether the target vehicle is parked; recording the target vehicle in an exit queue when the target vehicle goes out of the specific parking area by analyzing a parking monitoring image obtained from the sensor at a second time of point; performing an exit process when the target vehicle included in the exit queue moves to go out of the specific parking area by analyzing a parking monitoring image obtained from the sensor at a third time of point. A payment process in accordance with an exit of the target vehicle is performed based on payment information preregistered when the target vehicle is parked.Type: ApplicationFiled: November 23, 2023Publication date: March 14, 2024Inventors: Jin Ha JEONG, Moon Soo RA, Hea Yun LEE
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Patent number: 10453707Abstract: A method for fabricating a semiconductor device, the method including forming a mold structure on a substrate such that the mold structure includes alternately and repeatedly stacked interlayer insulating films and sacrificial films; forming a channel hole passing through the mold structure; forming a vertical channel structure within the channel hole; exposing a surface of the interlayer insulating films by removing the sacrificial films; forming an aluminum oxide film along a surface of the interlayer insulating films; forming a continuous film on the aluminum oxide film; and nitriding the continuous film to form a TiN film.Type: GrantFiled: October 24, 2017Date of Patent: October 22, 2019Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Yong Seok Cho, Hyung Joon Kim, Jung Ho Kim, Joong Yun Ra, Bi O Kim, Jae Young Ahn, Ki Yong Oh, Sung Hae Lee
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Patent number: 10276589Abstract: A method of manufacturing a semiconductor device includes forming a mold structure including alternately stacked mold insulating and sacrificial layers on a substrate, forming a vertical structure through the mold structure, forming side openings by removing the sacrificial, forming a preliminary dielectric layer in the side openings, forming a dielectric layer by heat-treating the preliminary dielectric layer, removing a surface layer of the dielectric layer, forming a first conductive layer covering the dielectric layer in the side openings, and forming a second conductive layer covering the first conductive layer and filling the side openings.Type: GrantFiled: April 27, 2017Date of Patent: April 30, 2019Assignee: Samsung Electronics Co., Ltd.Inventors: Hyung Joon Kim, Yong Seok Cho, BiO Kim, Jung Ho Kim, Joong Yun Ra, Sung Hae Lee
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Publication number: 20180315621Abstract: A method for fabricating a semiconductor device, the method including forming a mold structure on a substrate such that the mold structure includes alternately and repeatedly stacked interlayer insulating films and sacrificial films; forming a channel hole passing through the mold structure; forming a vertical channel structure within the channel hole; exposing a surface of the interlayer insulating films by removing the sacrificial films; forming an aluminum oxide film along a surface of the interlayer insulating films; forming a continuous film on the aluminum oxide film; and nitriding the continuous film to form a TiN film.Type: ApplicationFiled: October 24, 2017Publication date: November 1, 2018Inventors: Yong Seok CHO, Hyung Joon KIM, Jung Ho KIM, Joong Yun RA, Bi O KIM, Jae Young AHN, Ki Yong OH, Sung Hae LEE
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Patent number: 9991281Abstract: A semiconductor device is provided as follows. A tunnel insulation layer is disposed on a substrate. The tunnel insulation layer includes a first silicon oxide layer, a second silicon oxide layer, and a silicon layer interposed between the first silicon oxide layer and the second silicon oxide layer. The silicon layer has a thickness smaller than a thickness of each of the first silicon oxide layer and the second silicon oxide layer. A gate pattern is disposed on the tunnel insulation layer.Type: GrantFiled: August 8, 2017Date of Patent: June 5, 2018Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Ju-Mi Yun, Young-Jin Noh, Kwang-Min Park, Jae-Young Ahn, Guk-Hyon Yon, Dong-Chul Yoo, Joong-Yun Ra, Young-Seon Son, Jeon-Il Lee, Hun-Hyeong Lim
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Publication number: 20180122821Abstract: A method of manufacturing a semiconductor device includes forming a mold structure including alternately stacked mold insulating and sacrificial layers on a substrate, forming a vertical structure through the mold structure, forming side openings by removing the sacrificial, forming a preliminary dielectric layer in the side openings, forming a dielectric layer by heat-treating the preliminary dielectric layer, removing a surface layer of the dielectric layer, forming a first conductive layer covering the dielectric layer in the side openings, and forming a second conductive layer covering the first conductive layer and filling the side openings.Type: ApplicationFiled: April 27, 2017Publication date: May 3, 2018Inventors: Hyung Joon KIM, Yong Seok CHO, BiO KIM, Jung Ho KIM, Joong Yun RA, Sung Hae LEE
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Publication number: 20170358596Abstract: A semiconductor device is provided as follows. A tunnel insulation layer is disposed on a substrate. The tunnel insulation layer includes a first silicon oxide layer, a second silicon oxide layer, and a silicon layer interposed between the first silicon oxide layer and the second silicon oxide layer. The silicon layer has a thickness smaller than a thickness of each of the first silicon oxide layer and the second silicon oxide layer. A gate pattern is disposed on the tunnel insulation layer.Type: ApplicationFiled: August 8, 2017Publication date: December 14, 2017Inventors: JU-MI YUN, Young-Jin Noh, Kwang-Min Park, Jae-Young Ahn, Guk-Hyon Yon, Dong-Chul Yoo, Joong-Yun Ra, Young-Seon Son, Jeon-Il Lee, Hun-Hyeong Lim
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Patent number: 9754959Abstract: A semiconductor device is provided as follows. A tunnel insulation layer is disposed on a substrate. The tunnel insulation layer includes a first silicon oxide layer, a second silicon oxide layer, and a silicon layer interposed between the first silicon oxide layer and the second silicon oxide layer. The silicon layer has a thickness smaller than a thickness of each of the first silicon oxide layer and the second silicon oxide layer. A gate pattern is disposed on the tunnel insulation layer.Type: GrantFiled: December 9, 2015Date of Patent: September 5, 2017Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Ju-Mi Yun, Young-Jin Noh, Kwang-Min Park, Jae-Young Ahn, Guk-Hyon Yon, Dong-Chul Yoo, Joong-Yun Ra, Young-Seon Son, Jeon-Il Lee, Hun-Hyeong Lim
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Publication number: 20160172372Abstract: A semiconductor device is provided as follows. A tunnel insulation layer is disposed on a substrate. The tunnel insulation layer includes a first silicon oxide layer, a second silicon oxide layer, and a silicon layer interposed between the first silicon oxide layer and the second silicon oxide layer. The silicon layer has a thickness smaller than a thickness of each of the first silicon oxide layer and the second silicon oxide layer. A gate pattern is disposed on the tunnel insulation layer.Type: ApplicationFiled: December 9, 2015Publication date: June 16, 2016Inventors: JU-MI YUN, YOUNG-JIN NOH, KWANG-MIN PARK, JAE-YOUNG AHN, GUK-HYON YON, DONG-CHUL YOO, JOONG-YUN RA, YOUNG-SEON SON, JEON-IL LEE, HUN-HYEONG LIM
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Publication number: 20160168704Abstract: A gas injector may comprise: a gas introduction tube configured to introduce reaction gas into a reaction tube from a gas supply source; and/or a gas distributor connected to the gas introduction tube, extending from the gas introduction tube in a direction within the reaction tube, including a plurality of ejection holes in an inner surface of the gas distributor, and having an arc shape extending in a circumferential direction of the reaction tube. The ejection holes may be spaced apart from each other in the extending direction of the gas distributor, and are configured to spray the reaction gas.Type: ApplicationFiled: December 9, 2015Publication date: June 16, 2016Inventors: Ji-Hoon CHOI, Young-Jin NOH, Joong-Yun RA, Jae-Young AHN, Hun-hyeong LIM