Patents by Inventor Yun Ren
Yun Ren has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240145597Abstract: A method of forming a semiconductor device includes: forming a gate structure over a fin that protrudes above a substrate; forming source/drain regions over the fin on opposing sides of the gate structure; forming a first dielectric layer and a second dielectric layer successively over the source/drain regions; performing a first etching process to form an opening in the first dielectric layer and in the second dielectric layer, where the opening exposes an underlying electrically conductive feature; after performing the first etching process, performing a second etching process to enlarge a lower portion of the opening proximate to the substrate; and forming a contact plug in the opening after the second etching process.Type: ApplicationFiled: January 2, 2024Publication date: May 2, 2024Inventors: Yu-Lien Huang, Guan-Ren Wang, Ching-Feng Fu, Yun-Min Chang
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Publication number: 20240091366Abstract: The present invention relates to the field of pharmaceutical and chemical engineering, and specifically relates to a weakly acidic microenvironment-sensitive aptamer for tumors, a triptolide conjugate. The conjugate is formed by conjugation between the 14-position hydroxyl group of triptolide and the aptamer via an acetal ester linking bond, which is an acid-sensitive linking bond with a cleavage condition of (pH=3.5-6.5), which is much less pH-sensitive and is more likely to cleave under the tumor microenvironment. Based on the characteristics of the aptamer targeting the highly expressed proteins on the membrane surface of tumor cells, the conjugate delivered triptolide targeted to tumor cells and mediated endocytosis to reach the lysosome; based on the characteristics of the acidic environment of lysosomes, the acetal ester linking bond released intact triptolide in the lysosomal acidic environment, targeting and killing of tumor cells.Type: ApplicationFiled: September 14, 2023Publication date: March 21, 2024Inventors: Jun LU, Yun DENG, Yao CHEN, Jirui YANG, Yi ZUO, Xiao LI, Qing REN
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Patent number: 11916147Abstract: A method of forming a semiconductor device includes: forming a gate structure over a fin that protrudes above a substrate; forming source/drain regions over the fin on opposing sides of the gate structure; forming a first dielectric layer and a second dielectric layer successively over the source/drain regions; performing a first etching process to form an opening in the first dielectric layer and in the second dielectric layer, where the opening exposes an underlying electrically conductive feature; after performing the first etching process, performing a second etching process to enlarge a lower portion of the opening proximate to the substrate; and forming a contact plug in the opening after the second etching process.Type: GrantFiled: June 29, 2022Date of Patent: February 27, 2024Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTDInventors: Yu-Lien Huang, Guan-Ren Wang, Ching-Feng Fu, Yun-Min Chang
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Patent number: 11905165Abstract: The present invention relates to a MEMS device and related methods comprising a mirror for the measuring of light frequency. The MEMS mirror may rotate around a pivot point and is driven by a periodic force for continuous bi-directional motion without transient vibrations. The periodic force may further comprise transient functions comprising special waveforms when at the turn-around point of the bi-directional rotation.Type: GrantFiled: November 16, 2020Date of Patent: February 20, 2024Assignees: O-NET TECHNOLOGIES (GROUP) LTD., ITF TECHNOLOGIES INC.Inventors: Kevin Boyd, Zuowen Jiang, Yun Ren, Feng Tian
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Publication number: 20240013506Abstract: An example apparatus for mining multi-scale hard examples includes a convolutional neural network to receive a mini-batch of sample candidates and generate basic feature maps. The apparatus also includes a feature extractor and combiner to generate concatenated feature maps based on the basic feature maps and extract the concatenated feature maps for each of a plurality of received candidate boxes. The apparatus further includes a sample scorer and miner to score the candidate samples with multi-task loss scores and select candidate samples with multi-task loss scores exceeding a threshold score.Type: ApplicationFiled: September 6, 2023Publication date: January 11, 2024Inventors: Anbang Yao, Yun Ren, Hao Zhao, Tao Kong, Yurong Chen
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Patent number: 11790631Abstract: An example apparatus for mining multi-scale hard examples includes a convolutional neural network to receive a mini-batch of sample candidates and generate basic feature maps. The apparatus also includes a feature extractor and combiner to generate concatenated feature maps based on the basic feature maps and extract the concatenated feature maps for each of a plurality of received candidate boxes. The apparatus further includes a sample scorer and miner to score the candidate samples with multi-task loss scores and select candidate samples with multi-task loss scores exceeding a threshold score.Type: GrantFiled: August 20, 2021Date of Patent: October 17, 2023Assignee: Intel CorporationInventors: Anbang Yao, Yun Ren, Hao Zhao, Tao Kong, Yurong Chen
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Publication number: 20220162199Abstract: A compound represented by formula (I) or a pharmaceutically acceptable salt, a stereoisomer, a tautomer, a polymorph, a solvate, an N-oxide, an isotope labeled compound, a metabolite or a prodrug thereof, a pharmaceutical composition and a pill container comprising same, a preparation method therefor, and the use thereof in the preparation of drugs for preventing or treating STING-mediated related diseases.Type: ApplicationFiled: April 20, 2020Publication date: May 26, 2022Applicant: SICHUAN KELUN-BIOTECH BIOPHARMACEUTICAL CO., LTD.Inventors: Jinming LIU, Yun REN, Qiang TIAN, Hongmei SONG, Tongtong XUE, Jingyi WANG
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Publication number: 20220114825Abstract: An example apparatus for mining multi-scale hard examples includes a convolutional neural network to receive a mini-batch of sample candidates and generate basic feature maps. The apparatus also includes a feature extractor and combiner to generate concatenated feature maps based on the basic feature maps and extract the concatenated feature maps for each of a plurality of received candidate boxes. The apparatus further includes a sample scorer and miner to score the candidate samples with multi-task loss scores and select candidate samples with multi-task loss scores exceeding a threshold score.Type: ApplicationFiled: August 20, 2021Publication date: April 14, 2022Inventors: Anbang Yao, Yun Ren, Hao Zhao, Tao Kong, Yurong Chen
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Publication number: 20220098028Abstract: The present invention relates to a MEMS device and related methods comprising a mirror for the measuring of light frequency. The MEMS mirror may rotate around a pivot point and is driven by a periodic force for continuous bi-directional motion without transient vibrations. The periodic force may further comprise transient functions comprising special waveforms when at the turn-around point of the bi-directional rotation.Type: ApplicationFiled: November 16, 2020Publication date: March 31, 2022Inventors: Kevin Boyd, Zuowen Jiang, Yun Ren, Feng Tian
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Patent number: 11120314Abstract: An example apparatus for mining multi-scale hard examples includes a convolutional neural network to receive a mini-batch of sample candidates and generate basic feature maps. The apparatus also includes a feature extractor and combiner to generate concatenated feature maps based on the basic feature maps and extract the concatenated feature maps for each of a plurality of received candidate boxes. The apparatus further includes a sample scorer and miner to score the candidate samples with multi-task loss scores and select candidate samples with multi-task loss scores exceeding a threshold score.Type: GrantFiled: April 7, 2017Date of Patent: September 14, 2021Assignee: Intel CorporationInventors: Anbang Yao, Yun Ren, Hao Zhao, Tao Kong, Yurong Chen
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Publication number: 20210133518Abstract: An example apparatus for mining multi-scale hard examples includes a convolutional neural network to receive a mini-batch of sample candidates and generate basic feature maps. The apparatus also includes a feature extractor and combiner to generate concatenated feature maps based on the basic feature maps and extract the concatenated feature maps for each of a plurality of received candidate boxes. The apparatus further includes a sample scorer and miner to score the candidate samples with multi-task loss scores and select candidate samples with multi-task loss scores exceeding a threshold score.Type: ApplicationFiled: April 7, 2017Publication date: May 6, 2021Applicant: INTEL CORPORATIONInventors: Anbang Yao, Yun Ren, Hao Zhao, Tao Kong, Yurong Chen
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Patent number: 9096115Abstract: An energy transfer system includes a power transfer mechanism, a first system, and a second system. The first system includes a first pump-motor operatively connecting the first system to the power transfer mechanism and a regenerative system operatively connected to the first pump-motor. The second system is operatively connected to the power transfer mechanism. Power is transferred between systems by the power transfer mechanism. A method of energy transfer is also provided.Type: GrantFiled: November 17, 2011Date of Patent: August 4, 2015Assignee: Caterpillar Inc.Inventors: Aaron Yun-Ren Ho, Aristoteles RosaNeto
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Patent number: 8895435Abstract: The method of forming a polysilicon layer is provided. A first polysilicon layer with a first grain size is formed on a substrate. A second polysilicon layer with a second grain size is formed on the first polysilicon layer. The first grain size is smaller than the second grain size. The first polysilicon layer with a smaller grain size can serve as a base for the following deposition, so that the second polysilicon layer formed thereon has a flatter topography, and thus, the surface roughness is reduced and the Rs uniformity within a wafer is improved.Type: GrantFiled: January 31, 2011Date of Patent: November 25, 2014Assignee: United Microelectronics Corp.Inventors: Chien-Liang Lin, Yun-Ren Wang, Ying-Wei Yen, Wen-Yi Teng, Chan-Lon Yang
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Publication number: 20130125536Abstract: An energy transfer system includes a power transfer mechanism, a first system, and a second system. The first system includes a first pump-motor operatively connecting the first system to the power transfer mechanism and a regenerative system operatively connected to the first pump-motor. The second system is operatively connected to the power transfer mechanism. Power is transferred between systems by the power transfer mechanism. A method of energy transfer is also provided.Type: ApplicationFiled: November 17, 2011Publication date: May 23, 2013Applicant: CATERPILLAR INC.Inventors: Aaron Yun-Ren Ho, Aristoteles RosaNeto
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Patent number: 8374755Abstract: A control system for a machine is disclosed. The control system may have a power source, an operator input device configured to generate a first signal indicative of a desired mode of power source operation, and a work implement driven by the power source. The control system may also have a controller in communication with the power source and the operator input device. The controller may be configured to classify a currently performed work implement task and select an output map based on the classification of the currently performed work implement task and the first signal. The controller may further be configured to control the power source operation using the output map.Type: GrantFiled: July 31, 2007Date of Patent: February 12, 2013Assignee: Caterpillar Inc.Inventors: Hong-Chin Lin, Yun-Ren Ho, Lucas Adam Knapp
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Publication number: 20120193796Abstract: The method of forming a polysilicon layer is provided. A first polysilicon layer with a first grain size is formed on a substrate. A second polysilicon layer with a second grain size is formed on the first polysilicon layer. The first grain size is smaller than the second grain size. The first polysilicon layer with a smaller grain size can serve as a base for the following deposition, so that the second polysilicon layer formed thereon has a flatter topography, and thus, the surface roughness is reduced and the Rs uniformity within a wafer is improved.Type: ApplicationFiled: January 31, 2011Publication date: August 2, 2012Applicant: UNITED MICROELECTRONICS CORP.Inventors: Chien-Liang Lin, Yun-Ren Wang, Ying-Wei Yen, Wen-Yi Teng, Chan-Lon Yang
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Patent number: 7901321Abstract: A power train for a machine is provided having a power source and a transmission, which includes a plurality of gears configured to produce multiple output ratios when selectively engaged. The power train also has a torque converter operatively coupling the power source and the transmission. A lockup clutch is associated with the torque converter, and the engagement of the lockup clutch is restricted so that the lockup clutch is engaged only when permissible gear ratios are actuated. The power train further has a controller in communication with the lockup clutch, the controller being configured to selectively engage the lockup clutch in either a first or a second shift mode with the number of permissible gear ratios being greater in the first shift mode than the second shift mode.Type: GrantFiled: August 29, 2008Date of Patent: March 8, 2011Assignee: Caterpillar Inc.Inventors: James Thomas Ferrier, Yun-Ren Ho, Michael Angel Cobo
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Patent number: 7811892Abstract: A method of fabricating a dielectric layer is described. A substrate is provided, and a dielectric layer is formed over the substrate. The dielectric layer is performed with a nitridation process. The dielectric layer is performed with a first annealing process. A first gas used in the first annealing process includes inert gas and oxygen. The first gas has a first partial pressure ratio of inert gas to oxygen. The dielectric layer is performed with the second annealing process. A second gas used in the second annealing includes inert gas and oxygen. The second gas has a second partial pressure ratio of inert gas to oxygen, and the second partial pressure ratio is smaller than the first partial pressure ratio. At least one annealing temperature of the two annealing processes is equal to or greater than 950° C. The invention improves uniformity of nitrogen dopants distributed in dielectric layer.Type: GrantFiled: March 31, 2006Date of Patent: October 12, 2010Assignee: United Microelectronics Corp.Inventors: Yun-Ren Wang, Ying-Wei Yen, Chien-Hua Lung, Shu-Yen Chan, Kuo-Tai Huang
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Patent number: 7709316Abstract: A method of fabricating a gate structure is provided. First, a sacrificial oxide layer is formed on a substrate. A nitridation treatment process is performed to redistribute the nitrogen atoms in the sacrificial layer and the substrate. Next, the sacrificial oxide layer is removed. A re-oxidation process is performed to produce an interface layer on the surface of the substrate. A high K (dielectric constant) gate dielectric layer, a barrier layer and a metal layer are sequentially formed on the substrate. The metal layer, the barrier layer, the high K gate dielectric layer and the interface layer are defined to form a stacked gate structure.Type: GrantFiled: August 15, 2008Date of Patent: May 4, 2010Assignee: United Microelectronics Corp.Inventors: Yun-Ren Wang, Ying-Wei Yen, Shu-Yen Chan, Kuo-Tai Huang
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Publication number: 20100056335Abstract: A power train for a machine is provided having a power source and a transmission, which includes a plurality of gears configured to produce multiple output ratios when selectively engaged. The power train also has a torque converter operatively coupling the power source and the transmission. A lockup clutch is associated with the torque converter, and the engagement of the lockup clutch is restricted so that the lockup clutch is engaged only when permissible gear ratios are actuated. The power train further has a controller in communication with the lockup clutch, the controller being configured to selectively engage the lockup clutch in either a first or a second shift mode with the number of permissible gear ratios being greater in the first shift mode than the second shift mode.Type: ApplicationFiled: August 29, 2008Publication date: March 4, 2010Inventors: James Thomas Ferrier, Yun-Ren Ho, Michael Angel Cobo