Patents by Inventor Yun-San Huan

Yun-San Huan has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Pad structure to prompt excellent bondability for low-k intermetal dielectric layers
    Patent number: 7642658
    Abstract: A method of fabricating a bonding pad anchoring structure comprising the following steps. Providing a substrate. Forming a series of grated metal layers over the substrate separated by an interleaving series of via plug layers having via plugs electrically connecting respective at least a portion of adjacent grated metal layers. The series of grated metal layers having an uppermost grated metal layer. Forming an uppermost via plug layer over the uppermost grated metal layer. The uppermost via plug layer having via plugs. Forming a bonding pad layer over the uppermost via plug layer so that the uppermost via plugs within the uppermost via plug layer electrically connect the bonding pad layer to at least a portion of the uppermost grated metal layer whereby the bonding pad layer is securely bonded to the substrate.
    Type: Grant
    Filed: October 6, 2005
    Date of Patent: January 5, 2010
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Tze-Liang Lee, Yun-San Huan
  • Novel pad structure to prompt excellent bondability for low-k intermetal dielectric layers
    Publication number: 20060060967
    Abstract: A method of fabricating a bonding pad anchoring structure comprising the following steps. Providing a substrate. Forming a series of grated metal layers over the substrate separated by an interleaving series of via plug layers having via plugs electrically connecting respective at least a portion of adjacent grated metal layers. The series of grated metal layers having an uppermost grated metal layer. Forming an uppermost via plug layer over the uppermost grated metal layer. The uppermost via plug layer having via plugs. Forming a bonding pad layer over the uppermost via plug layer so that the uppermost via plugs within the uppermost via plug layer electrically connect the bonding pad layer to at least a portion of the uppermost grated metal layer whereby the bonding pad layer is securely bonded to the substrate.
    Type: Application
    Filed: October 6, 2005
    Publication date: March 23, 2006
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Tze-Liang Lee, Yun-San Huan
  • Pad structure to prompt excellent bondability for low-k intermetal dielectric layers
    Patent number: 6955981
    Abstract: A method of fabricating a bonding pad anchoring structure comprising the following steps. Providing a substrate. Forming a series of grated metal layers over the substrate separated by an interleaving series of via plug layers having via plugs electrically connecting respective at least a portion of adjacent grated metal layers. The series of grated metal layers having an uppermost grated metal layer. Forming an uppermost via plug layer over the uppermost grated metal layer. The uppermost via plug layer having via plugs. Forming a bonding pad layer over the uppermost via plug layer so that the uppermost via plugs within the uppermost via plug layer electrically connect the bonding pad layer to at least a portion of the uppermost grated metal layer whereby the bonding pad layer is securely bonded to the substrate.
    Type: Grant
    Filed: September 13, 2002
    Date of Patent: October 18, 2005
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Tze-Liang Lee, Yun-San Huan
  • Novel pad structure to prompt excellent bondability for low-k intermetal dielectric layers
    Publication number: 20040052990
    Abstract: A method of fabricating a bonding pad anchoring structure comprising the following steps. Providing a substrate. Forming a series of grated metal layers over the substrate separated by an interleaving series of via plug layers having via plugs electrically connecting respective at least a portion of adjacent grated metal layers. The series of grated metal layers having an uppermost grated metal layer. Forming an uppermost via plug layer over the uppermost grated metal layer. The uppermost via plug layer having via plugs. Forming a bonding pad layer over the uppermost via plug layer so that the uppermost via plugs within the uppermost via plug layer electrically connect the bonding pad layer to at least a portion of the uppermost grated metal layer whereby the bonding pad layer is securely bonded to the substrate.
    Type: Application
    Filed: September 13, 2002
    Publication date: March 18, 2004
    Applicant: Taiwan Semiconductor Manufacturing Company
    Inventors: Tze-Liang Lee, Yun-San Huan