Abstract: A semiconductor memory device has independently controllable word lines, thereby allowing various background data patterns to be freely written to the memory cells to perform various wafer burn-in tests. This allows the leakage between adjacent memory cells to be efficiently tested by independently controllable word line activation signals, as well as the reliability of bit lines. A wafer burn-in test circuit for performing this improved burn-in test improves the reliability of the device by performing a level transition on the signals that drive the sub word line drivers, thereby eliminating the need to apply a high voltage to one transistor in the sub word line driver.

Abstract: A data output circuit of a semiconductor memory circuit with pull-up and pull-down transistors for outputting data through complementary switching operation, comprising a pre-charge means for pre-charging a pair of data signals read from a memory cell having a given voltage level in a first operational mode, a switching means for connecting the output signal of the pre-charge means amplified to the gates of the pull-up and pull-down transistors, and an enable circuit for connecting the output signal of the switching means to the gates of the pull-up and pull-down transistors in a second operational mode. The switching means is a level change circuit to control the pull-up and pull-down transistors, which are data output drivers, by employing a constant voltage source to provide a voltage rise Vpp increased over the source voltage level Vcc of an integrated circuit before enabling the integrated circuit.