Patents by Inventor Yun-Ting Chiang

Yun-Ting Chiang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250089325
    Abstract: A method includes forming a multi-layer stack over a semiconductor substrate, the multi-layer stack comprising a plurality of sacrificial layers that alternate with a plurality of channel layers, forming a dummy gate stack over a top surface and sidewalls of the multi-layer stack, forming first spacers on sidewalls of the dummy gate stack, growing an epitaxial source/drain region that extends through the plurality of sacrificial layers and the plurality of channel layers, forming a metal-semiconductor alloy region on first portions of the epitaxial source/drain region, forming a coating layer on the metal-semiconductor alloy region, wherein during the forming of the metal-semiconductor alloy region and the coating layer, a residual layer is formed on sidewalls of the first spacers, and performing a wet clean process to selectively etch the residual layer from the sidewalls of the first spacers.
    Type: Application
    Filed: September 8, 2023
    Publication date: March 13, 2025
    Inventors: Yao-Wen Hsu, Yun-Ting Chiang, Chun-Cheng Chou
  • Publication number: 20230402544
    Abstract: A FinFET includes a semiconductor substrate, a semiconductor fin, a gate structure, and an isolation structure. The semiconductor fin protrudes from the semiconductor substrate. The gate structure is disposed across a first segment of the semiconductor fin. The isolation structure interrupts a continuity of a second segment of the semiconductor fin. The isolation structure has a first portion and a second portion stacked on the first portion. Sidewalls of the first portion are inclined and sidewalls of the second portion are straight. A top surface of the first portion is coplanar with a top surface of the gate structure.
    Type: Application
    Filed: June 13, 2022
    Publication date: December 14, 2023
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Ya-Yi Tsai, Sheng-Yi Hsiao, Chao-Hsuan Chen, Yun-Ting Chiang, Shu-Yuan Ku
  • Publication number: 20150204865
    Abstract: A sensing method, comprising steps of causing a first molecule to be adjacent to one of a plurality of first nanoparticles spacedly disposed on a detachable chip; adding a target object to contact the first molecule; and measuring a spectral signal, wherein a variation of the spectral signal of the plurality of first nanoparticles occurs when the target object demonstrates a first specific binding with the first molecule.
    Type: Application
    Filed: January 21, 2015
    Publication date: July 23, 2015
    Applicant: SIWARD CRYSTAL TECHNOLOGY CO., LTD.
    Inventors: Kuan-Jiuh Lin, Chuen-Yuan Hsu, Wei-Hung Chen, Yi-Heui Hsieh, Yun-Ting Chiang, Jia Yu Chang