Patents by Inventor Yun-Tzu Chiu
Yun-Tzu Chiu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11735436Abstract: An apparatus for fabricating a semiconductor device has a housing defining a buffer chamber, a plurality of reactor ports formed in the housing for establishing interfaces with a plurality of process chambers that are to receive a wafer during a fabrication process to fabricate the semiconductor device, a wafer positioning robot positioned within the buffer chamber to transport the wafer between the plurality of process chambers through the plurality of reactor ports, a purge port formed in the housing for introducing a purge gas into the buffer chamber, a pump port formed in the housing for exhausting a portion of the purge gas from the buffer chamber, and a first flow enhancer that directs the purge gas flowing in an axial direction along a longitudinal axis of the purge port into the buffer chamber in a plurality of radial directions relative to the longitudinal axis.Type: GrantFiled: August 10, 2022Date of Patent: August 22, 2023Assignee: Taiwan Semiconductor Manufacturing Company LimitedInventors: Chih-Tsung Lee, Sheng-Chun Yang, Yun-Tzu Chiu, Chao-Hung Wan, Yi-Ming Lin, Chyi-Tsong Ni
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Patent number: 11685994Abstract: Pumping liners for use in an apparatus for depositing a material on a work piece by chemical vapor deposition includes a plurality of unevenly spaced apertures are disclosed. Uneven spacing of the plurality of apertures produces a uniform flow of processing gases within a processing chamber with which the pumping liner is associated. Films of materials deposited onto a work piece by chemical vapor deposition techniques using disclosed pumping liners exhibit desirable properties such as uniform thickness and smooth and uniform surfaces.Type: GrantFiled: September 13, 2019Date of Patent: June 27, 2023Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Sheng-chun Yang, Yi-Ming Lin, Chih-tsung Lee, Yun-Tzu Chiu, Chao-Hung Wan
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Publication number: 20220392782Abstract: An apparatus for fabricating a semiconductor device has a housing defining a buffer chamber, a plurality of reactor ports formed in the housing for establishing interfaces with a plurality of process chambers that are to receive a wafer during a fabrication process to fabricate the semiconductor device, a wafer positioning robot positioned within the buffer chamber to transport the wafer between the plurality of process chambers through the plurality of reactor ports, a purge port formed in the housing for introducing a purge gas into the buffer chamber, a pump port formed in the housing for exhausting a portion of the purge gas from the buffer chamber, and a first flow enhancer that directs the purge gas flowing in an axial direction along a longitudinal axis of the purge port into the buffer chamber in a plurality of radial directions relative to the longitudinal axis.Type: ApplicationFiled: August 10, 2022Publication date: December 8, 2022Inventors: Chih-Tsung LEE, Sheng-chun Yang, Yun-Tzu Chiu, Chao-Hung Wan, Yi-Ming Lin, Chyi-Tsong Ni
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Publication number: 20220356574Abstract: Pumping liners for use in an apparatus for depositing a material on a work piece by chemical vapor deposition includes a plurality of unevenly spaced apertures are disclosed. Uneven spacing of the plurality of apertures produces a uniform flow of processing gases within a processing chamber with which the pumping liner is associated. Films of materials deposited onto a work piece by chemical vapor deposition techniques using disclosed pumping liners exhibit desirable properties such as uniform thickness and smooth and uniform surfaces.Type: ApplicationFiled: July 20, 2022Publication date: November 10, 2022Inventors: Sheng-chun YANG, Yi-Ming LIN, Chih-tsung LEE, Yun-Tzu CHIU, Chao-Hung WAN
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Patent number: 11443961Abstract: An apparatus for fabricating a semiconductor device has a housing defining a buffer chamber, a plurality of reactor ports formed in the housing for establishing interfaces with a plurality of process chambers that are to receive a wafer during a fabrication process to fabricate the semiconductor device, a wafer positioning robot positioned within the buffer chamber to transport the wafer between the plurality of process chambers through the plurality of reactor ports, a purge port formed in the housing for introducing a purge gas into the buffer chamber, a pump port formed in the housing for exhausting a portion of the purge gas from the buffer chamber, and a first flow enhancer that directs the purge gas flowing in an axial direction along a longitudinal axis of the purge port into the buffer chamber in a plurality of radial directions relative to the longitudinal axis.Type: GrantFiled: August 26, 2020Date of Patent: September 13, 2022Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, ltd.Inventors: Chih-Tsung Lee, Sheng-Chun Yang, Yun-Tzu Chiu, Chao-Hung Wan, Yi-Ming Lin, Chyi-Tsong Ni
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Publication number: 20210079524Abstract: Pumping liners for use in an apparatus for depositing a material on a work piece by chemical vapor deposition includes a plurality of unevenly spaced apertures are disclosed. Uneven spacing of the plurality of apertures produces a uniform flow of processing gases within a processing chamber with which the pumping liner is associated. Films of materials deposited onto a work piece by chemical vapor deposition techniques using disclosed pumping liners exhibit desirable properties such as uniform thickness and smooth and uniform surfaces.Type: ApplicationFiled: September 13, 2019Publication date: March 18, 2021Inventors: Sheng-chun YANG, Yi-Ming LIN, Chih-tsung LEE, Yun-Tzu CHIU, Chao-Hung WAN
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Publication number: 20210066096Abstract: An apparatus for fabricating a semiconductor device has a housing defining a buffer chamber, a plurality of reactor ports formed in the housing for establishing interfaces with a plurality of process chambers that are to receive a wafer during a fabrication process to fabricate the semiconductor device, a wafer positioning robot positioned within the buffer chamber to transport the wafer between the plurality of process chambers through the plurality of reactor ports, a purge port formed in the housing for introducing a purge gas into the buffer chamber, a pump port formed in the housing for exhausting a portion of the purge gas from the buffer chamber, and a first flow enhancer that directs the purge gas flowing in an axial direction along a longitudinal axis of the purge port into the buffer chamber in a plurality of radial directions relative to the longitudinal axis.Type: ApplicationFiled: August 26, 2020Publication date: March 4, 2021Inventors: Chih-Tsung LEE, Sheng-Chun YANG, Yun-Tzu CHIU, Chao-Hung WAN, Yi-Ming LIN, Chyi-Tsong NI
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Patent number: 10269560Abstract: A method for manufacturing semiconductor structure is disclosed. The method includes: providing a semiconductor substrate; hydrogenizing a surface of the semiconductor substrate; supplying a precursor to the surface of the semiconductor substrate; and supplying a reactant to the surface of the semiconductor substrate. An associated method for performing an atomic layer deposition (ALD) upon a semiconductor substrate and an associated atomic layer deposition (ALD) method are also disclosed.Type: GrantFiled: June 15, 2016Date of Patent: April 23, 2019Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.Inventors: Yun-Tzu Chiu, Hsueh-Hui Kuo, Lin-Jung Wu, Chih-Tsung Lee
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Publication number: 20170365483Abstract: A method for manufacturing semiconductor structure is disclosed. The method includes: providing a semiconductor substrate; hydrogenizing a surface of the semiconductor substrate; supplying a precursor to the surface of the semiconductor substrate; and supplying a reactant to the surface of the semiconductor substrate. An associated method for performing an atomic layer deposition (ALD) upon a semiconductor substrate and an associated atomic layer deposition (ALD) method are also disclosed.Type: ApplicationFiled: June 15, 2016Publication date: December 21, 2017Inventors: YUN-TZU CHIU, HSUEH-HUI KUO, LIN-JUNG WU, CHIH-TSUNG LEE
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Publication number: 20070016318Abstract: A system for managing production availability. A storage device stores a production entry corresponding to a client for production using a particular technology. The production entry comprises a demand profile and a production availability profile. The demand profile specifies the amount of capacity allocated support demand (CASD) for the client during a preset period, comprising a non-booked CASD and a booked CASD. The production availability profile specifies available-to-promise (ATP) production corresponding to the non-booked CASD, comprising production values specifying quantities of ATP production allocated to the client during different divisions of the preset period.Type: ApplicationFiled: July 15, 2005Publication date: January 18, 2007Inventors: Wei-Yao Lin, Rebecca Hsu, Yun-Tzu Chiu