Abstract: Semiconductor device structures and methods for forming the same are provided. A semiconductor device structure includes a gate structure over a semiconductor substrate. The gate structure includes a gate electrode layer and a gate dielectric layer covering a bottom surface and sidewalls of the gate electrode layer. The semiconductor device structure also includes spacer elements in contact with sidewalls of the gate structure and protruding from a top surface of the gate electrode layer. The semiconductor device structure also includes a first protection layer over the gate electrode layer and between the spacer elements. The semiconductor device structure also includes a dielectric layer over the first protection layer and between the spacer elements. A portion of the dielectric layer is between sidewalls of the spacer elements and sidewalls of the first protection layer.

Abstract: Semiconductor device structures and methods for forming the same are provided. A semiconductor device structure includes a gate structure over a semiconductor substrate. The gate structure includes a gate electrode layer and a gate dielectric layer covering a bottom surface and sidewalls of the gate electrode layer. The semiconductor device structure also includes spacer elements in contact with sidewalls of the gate structure and protruding from a top surface of the gate electrode layer. The semiconductor device structure also includes a first protection layer over the gate electrode layer and between the spacer elements. The semiconductor device structure also includes a dielectric layer over the first protection layer and between the spacer elements. A portion of the dielectric layer is between sidewalls of the spacer elements and sidewalls of the first protection layer.

Abstract: Semiconductor device structures and methods for forming the same are provided. A method for forming a semiconductor device structure includes forming a gate structure over a semiconductor substrate. The method also includes forming spacer elements adjoining sidewalls of the gate structure. The method further includes forming a protection material layer over the gate structure. The formation of the protection material layer includes a substantial non-plasma process. In addition, the method includes depositing a dielectric material layer over the protection material layer. The deposition of the dielectric material layer includes a plasma-involved process.

Abstract: A method for fabricating a shallow trench isolation (STI) structure comprises the following steps. A silane-base precursor having a volumetric flowrate of 500 to 750 sccm and a nitrogen-base precursor having a volumetric flowrate of 300 to 600 sccm are introduced and mixed under a first pressure ranging from 0.5 to 1.5 torr at a first temperature ranging from 30 to 105 centigrade to deposit a flowable dielectric layer in a trench of a substrate. Then, ozone gas and oxygen gas are introduced and mixed under a second pressure ranging from 300 to 650 torr at a second temperature ranging from 50 to 250 centigrade to treat the flowable dielectric layer, wherein a volumetric flowrate ratio of ozone gas and oxygen gas ranges from 1:1 to 3:1. A method for fabricating a FinFET is provided.

Abstract: Semiconductor device structures and methods for forming the same are provided. A method for forming a semiconductor device structure includes forming a gate structure over a semiconductor substrate. The method also includes forming spacer elements adjoining sidewalls of the gate structure. The method further includes forming a protection material layer over the gate structure. The formation of the protection material layer includes a substantial non-plasma process. In addition, the method includes depositing a dielectric material layer over the protection material layer. The deposition of the dielectric material layer includes a plasma-involved process.

Abstract: A method for fabricating a shallow trench isolation (STI) structure comprises the following steps. A silane-base precursor having a volumetric flowrate of 500 to 750 sccm and a nitrogen-base precursor having a volumetric flowrate of 300 to 600 sccm are introduced and mixed under a first pressure ranging from 0.5 to 1.5 torr at a first temperature ranging from 30 to 105 centigrade to deposit a flowable dielectric layer in a trench of a substrate. Then, ozone gas and oxygen gas are introduced and mixed under a second pressure ranging from 300 to 650 torr at a second temperature ranging from 50 to 250 centigrade to treat the flowable dielectric layer, wherein a volumetric flowrate ratio of ozone gas and oxygen gas ranges from 1:1 to 3:1. A method for fabricating a FinFET is provided.

Abstract: An ultraviolet curing apparatus includes a chamber, a gas flow generator, and an ultraviolet lamp. The gas flow generator includes a top liner and a bottom liner coupled to each other. The top liner and the bottom liner are disposed in the chamber, and are made of low-coefficient of thermal expansion material. The ultraviolet lamp is disposed on the chamber and is configured for providing ultraviolet light.

Abstract: An ultraviolet curing apparatus includes a chamber, a gas flow generator, and an ultraviolet lamp. The gas flow generator includes a top liner and a bottom liner coupled to each other. The top liner and the bottom liner are disposed in the chamber, and are made of low-coefficient of thermal expansion material. The ultraviolet lamp is disposed on the chamber and is configured for providing ultraviolet light.